u-boot.git/drivers/clk, branch v2022.01 Unnamed repository; edit this file 'description' to name the repository. Revert "clk: Detect failure to set defaults" 2022-01-07T14:30:45+00:00 Marek Vasut marex@denx.de 2022-01-01T18:51:39+00:00 75f080df46f28f24a617652c8af028cc349f908b This reverts commit 92f1e9a4b31c0bf0f4f61ab823a6a88657323646. The aforementioned patch causes massive breakage on all platforms which have 'assigned-clock' DT property in their DT which references any clock that are not supported by the platform clock driver. That can easily happen either in SPL, or because the clock driver is reduced. Currently it seems all iMX8M are affected and fail to boot altogether. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Peng Fan <peng.fan@oss.nxp.com> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Fabio Estevam <festevam@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> 
This reverts commit 92f1e9a4b31c0bf0f4f61ab823a6a88657323646.
The aforementioned patch causes massive breakage on all platforms which
have 'assigned-clock' DT property in their DT which references any clock
that are not supported by the platform clock driver. That can easily
happen either in SPL, or because the clock driver is reduced. Currently
it seems all iMX8M are affected and fail to boot altogether.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Peng Fan <peng.fan@oss.nxp.com>
Cc: Simon Glass <sjg@chromium.org>
Reviewed-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
clk: define LOG_CATEGORY for generic and ccf clocks 2021-12-15T17:16:16+00:00 Patrick Delaunay patrick.delaunay@foss.st.com 2021-11-19T14:12:07+00:00 560e1e005093b1d62c53391d68960237294e7f89 Define LOG_CATEGORY to allow filtering with log command for generic clock and CCF clocks. This patch also change existing printf, debug and pr_ macro to log_ or dev_ macro. Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com> Reviewed-by: Sean Anderson <seanga2@gmail.com> 
Define LOG_CATEGORY to allow filtering with log command
for generic clock and CCF clocks.

This patch also change existing printf, debug and pr_ macro
to log_ or dev_ macro.

Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Sean Anderson <seanga2@gmail.com>
clk: cosmetic: reorder include files 2021-12-15T17:16:16+00:00 Patrick Delaunay patrick.delaunay@foss.st.com 2021-11-19T14:12:06+00:00 572c446e98e224555be1ae2add1b49ff1a60ed7a Reorder include files in the U-Boot expected order: the common.h header should always be first, followed by other headers in order, then headers with directories, then local files. It is a preliminary step for next patch. Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com> Reviewed-by: Sean Anderson <seanga2@gmail.com> 
Reorder include files in the U-Boot expected order:

the common.h header should always be first,
followed by other headers in order,
then headers with directories,
then local files.

It is a preliminary step for next patch.

Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Sean Anderson <seanga2@gmail.com>
stm32mp15: replace CONFIG_TFABOOT when it is possible 2021-11-10T16:07:31+00:00 Patrick Delaunay patrick.delaunay@foss.st.com 2021-10-11T07:52:50+00:00 f42045b2e75036330741c3fd3a1b5ca64867aaa0 In some part of STM32MP15 support the CONFIG_TFABOOT can be replaced by other config: CONFIG_ARMV7_PSCI and CONFIG_ARM_SMCCC. This patch also simplifies the code in cpu.c, stm32mp1_ram.c and clk_stml32mp1.c as execution of U-Boot in sysram (boot without SPL and without TFA) is not supported: the associated initialization code is present only in SPL. This cleanup patch is a preliminary step to support SPL load of OP-TEE in secure world, with SPL in secure world and U-Boot in no-secure world. Reported-by: Alexandru Gagniuc <mr.nuke.me@gmail.com> Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com> 
In some part of STM32MP15 support the CONFIG_TFABOOT can be replaced
by other config: CONFIG_ARMV7_PSCI and CONFIG_ARM_SMCCC.

This patch also simplifies the code in cpu.c, stm32mp1_ram.c and
clk_stml32mp1.c as execution of U-Boot in sysram (boot without SPL and
without TFA) is not supported: the associated initialization code is
present only in SPL.

This cleanup patch is a preliminary step to support SPL load of OP-TEE
in secure world, with SPL in secure world and U-Boot in no-secure world.

Reported-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
clk: sunxi: Extend DM_RESET selection to SPL 2021-10-25T13:54:06+00:00 Samuel Holland samuel@sholland.org 2021-09-11T19:45:31+00:00 e0c628d728d6f2b0ab01488706b1a9679512a982 The sunxi clock driver exposes a reset controller, so it selects the reset controller framework. Ensure that dependency is also satisfied when building the driver for the SPL. Signed-off-by: Samuel Holland <samuel@sholland.org> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com> 
The sunxi clock driver exposes a reset controller, so it selects the
reset controller framework. Ensure that dependency is also satisfied
when building the driver for the SPL.

Signed-off-by: Samuel Holland <samuel@sholland.org>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
clk: sifive: Fix -Wint-to-pointer-cast warning 2021-10-20T02:59:09+00:00 Bin Meng bmeng.cn@gmail.com 2021-09-12T03:15:09+00:00 2edb02ead760630a6495d4e583e2364d10cb850a dev_read_addr() returns a value of type fdt_addr_t which is a 64-bit address and pd->va is a pointer. In a 32-bit build, this causes the following warning seen when building sifive-prci.c: warning: cast to pointer from integer of different size [-Wint-to-pointer-cast] Change to use dev_read_addr_ptr(). Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com> 
dev_read_addr() returns a value of type fdt_addr_t which is a 64-bit
address and pd->va is a pointer. In a 32-bit build, this causes the
following warning seen when building sifive-prci.c:

  warning: cast to pointer from integer of different size [-Wint-to-pointer-cast]

Change to use dev_read_addr_ptr().

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
clk: fixed_rate: add dummy disable() function 2021-10-19T15:25:25+00:00 Samuel Holland samuel@sholland.org 2021-10-13T00:40:29+00:00 17864406a4aa3286a8e9db6f577105e3e647c65f commit 6bf6d81c1112 ("clk: fixed_rate: add dummy enable() function") implemented .enable, so fixed rate clocks can be used where drivers might call clk_enable(). Implement the .disable op for the same reason; some drivers, e.g. USB PHYs, may attempt to disable clocks at runtime. Signed-off-by: Samuel Holland <samuel@sholland.org> 
commit 6bf6d81c1112 ("clk: fixed_rate: add dummy enable() function")
implemented .enable, so fixed rate clocks can be used where drivers
might call clk_enable(). Implement the .disable op for the same reason;
some drivers, e.g. USB PHYs, may attempt to disable clocks at runtime.

Signed-off-by: Samuel Holland <samuel@sholland.org>
clk: rockchip: rk3568: update clks 2021-10-15T12:57:31+00:00 Elaine Zhang zhangqing@rock-chips.com 2021-10-12T08:43:00+00:00 f2cdd44adb9f06f455185b4882cfd91e8d75d58a fix up ppll init freq. support tclk_emmc. add freq (26M) for mmc device. fix up the sfc clk rate unit error. Change in V2: remove change id. Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com> 
fix up ppll init freq.
support tclk_emmc.
add freq (26M) for mmc device.
fix up the sfc clk rate unit error.

Change in V2:
remove change id.

Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
rockchip: px30: add support for setting cpll clock 2021-10-15T12:56:09+00:00 Chris Morgan macromorgan@hotmail.com 2021-08-05T16:48:47+00:00 ef120e0b30d05ca444753e995bcfc4e4333261f1 Starting with commit 92f1e9a4b31c ("clk: Detect failure to set defaults") the clk driver for the PX30 for the Odroid Go Advance would no longer probe correctly, because setting the cpll and gpu clocks are not supported with the clk_px30 U-Boot driver. This adds support for setting the cpll clock to the clk_px30 driver. Another patch will update the U-Boot specific device-tree to remove the GPU clock which is not used by U-Boot. Signed-off-by: Chris Morgan <macromorgan@hotmail.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com> 
Starting with commit 92f1e9a4b31c ("clk: Detect failure to set
defaults") the clk driver for the PX30 for the Odroid Go Advance would
no longer probe correctly, because setting the cpll and gpu clocks are
not supported with the clk_px30 U-Boot driver. This adds support for
setting the cpll clock to the clk_px30 driver. Another patch will
update the U-Boot specific device-tree to remove the GPU clock which is
not used by U-Boot.

Signed-off-by: Chris Morgan <macromorgan@hotmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Merge https://source.denx.de/u-boot/custodians/u-boot-sunxi 2021-10-12T15:45:00+00:00 Tom Rini trini@konsulko.com 2021-10-12T12:58:58+00:00 2aab77f7263bb6e27120cfea82fc5efa4f625014 The bulk of it is Samuel's DM_I2C rework, which removes the nasty I2C deprecation warnings for most 32-bit boards. It also includes some smaller refactorings that pave the way for more changes, mostly driven by needing to support the Allwinner RISC-V SoC later on. Board wise we gain support for the FriendlyARM NanoPi R1S H5 router board and official Pinetab support. Build-tested for all 160 sunxi boards, and boot tested on a A64, A20, H3, H6, and H616 board. USB, SD card, eMMC, and Ethernet all work there (where applicable). 
The bulk of it is Samuel's DM_I2C rework, which removes the nasty I2C
deprecation warnings for most 32-bit boards. It also includes some
smaller refactorings that pave the way for more changes, mostly driven
by needing to support the Allwinner RISC-V SoC later on.

Board wise we gain support for the FriendlyARM NanoPi R1S H5 router
board and official Pinetab support.

Build-tested for all 160 sunxi boards, and boot tested on a A64, A20,
H3, H6, and H616 board. USB, SD card, eMMC, and Ethernet all work there
(where applicable).