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<title>u-boot.git/drivers/clk, branch v2023.07</title>
<subtitle>Unnamed repository; edit this file 'description' to name the repository.</subtitle>
<id>http://cgit.235523.xyz/u-boot.git/atom/drivers/clk?h=v2023.07</id>
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<updated>2023-05-25T18:27:39Z</updated>
<entry>
<title>Merge tag 'u-boot-imx-20230525' of https://gitlab.denx.de/u-boot/custodians/u-boot-imx</title>
<updated>2023-05-25T18:27:39Z</updated>
<author>
<name>Tom Rini</name>
<email>trini@konsulko.com</email>
</author>
<published>2023-05-25T18:27:39Z</published>
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<id>urn:sha1:6dcee70692601bd3296c86ac07d0317bf06d2b7b</id>
<content type='text'>
u-boot-imx-20230525
-------------------

- i.MX93 series
- Fixes

CI: https://source.denx.de/u-boot/custodians/u-boot-imx/-/pipelines/16412
</content>
</entry>
<entry>
<title>imx: move imx8 sci header file to include/firmware/imx</title>
<updated>2023-05-21T14:54:32Z</updated>
<author>
<name>Peng Fan</name>
<email>peng.fan@nxp.com</email>
</author>
<published>2023-04-28T04:08:09Z</published>
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<id>urn:sha1:99ac6c769f92b29a6317ee6beb239269bc59a82d</id>
<content type='text'>
Move imx8 sci header file to include/firmware/imx, then we could
use build macro to reuse some i.MX8 drivers for i.MX9, such as
drivers/cpu/imx8_cpu.c.

Signed-off-by: Peng Fan &lt;peng.fan@nxp.com&gt;
Signed-off-by: Stefano Babic &lt;sbabic@denx.de&gt;
</content>
</entry>
<entry>
<title>reset: rockchip: implement rk3588 lookup table</title>
<updated>2023-05-17T09:36:18Z</updated>
<author>
<name>Eugen Hristev</name>
<email>eugen.hristev@collabora.com</email>
</author>
<published>2023-05-15T10:55:04Z</published>
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<id>urn:sha1:bb52f1c604d09b0c378addfa5c75c82efc219b03</id>
<content type='text'>
The current DT bindings for the rk3588 clock use a different ID than the
one that is supposed to be written to the hardware registers.
Thus, we cannot use directly the id provided in the phandle, but rather
use a lookup table to correctly setup the hardware.

This approach has been implemented already in Linux, by commit :
f1c506d152ff ("clk: rockchip: add clock controller for the RK3588")

Hence, implement a similar approach using the lookup table, and adapt
the existing reset driver to work with SoCs using lookup table.
The file rst-rk3588.c has been copied as much as possible from Linux.

Adapt the clk rk3588 driver as well to bind the reset driver with the
lookup table.

Reviewed-by: Kever Yang &lt;kever.yang@rock-chips.com&gt;
Signed-off-by: Eugen Hristev &lt;eugen.hristev@collabora.com&gt;
</content>
</entry>
<entry>
<title>clk: renesas: add R906G032 driver</title>
<updated>2023-05-13T02:01:30Z</updated>
<author>
<name>Ralph Siemsen</name>
<email>ralph.siemsen@linaro.org</email>
</author>
<published>2023-05-13T01:36:51Z</published>
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<id>urn:sha1:f6c7122ce699e748ad848b62112ee6f3943054e5</id>
<content type='text'>
Clock driver for the Renesas RZ/N1 SoC family. This is based on
Linux kernel 6.2.y drivers/clk/renesas/r9a06g032-clocks.c as found in
commit 02693e11611e ("clk: renesas: r9a06g032: Repair grave increment error"),
with the following additional patch series applied:
https://lore.kernel.org/linux-renesas-soc/20230301215520.828455-1-ralph.siemsen@linaro.org/

Notable difference: this version avoids allocating a 'struct clk'
for each clock source, as this is problematic before relocation.
Instead, it uses the same approach as existing Renesas R-Car Gen2/3
clock drivers, using a temporary structure filled on-the-fly.

Signed-off-by: Ralph Siemsen &lt;ralph.siemsen@linaro.org&gt;
Reviewed-by: Marek Vasut &lt;marek.vasut+renesas@mailbox.org&gt;
</content>
</entry>
<entry>
<title>clk: renesas: prepare for non R-Car clock drivers</title>
<updated>2023-05-13T02:01:30Z</updated>
<author>
<name>Ralph Siemsen</name>
<email>ralph.siemsen@linaro.org</email>
</author>
<published>2023-05-13T01:36:50Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=2f6c3f49354a856089d182bb0ee84745e0a68ab1'/>
<id>urn:sha1:2f6c3f49354a856089d182bb0ee84745e0a68ab1</id>
<content type='text'>
Add new CONFIG_CLK_RCAR to control compilation of shared code for R-Car
clock drivers (renesas-cpg-mssr.c). Enable this for R-Car Gen2 and 3.

This is necessary so that CONFIG_CLK_RENESAS can be enabled, allowing
recursion into the drivers/clk/reneasas directory, without bringing in
the R-Car support code. The support code contains platform specific
access (TMU_BASE) which is not needed on other Renesas devices such as
RZ/N1.

Signed-off-by: Ralph Siemsen &lt;ralph.siemsen@linaro.org&gt;
Reviewed-by: Sean Anderson &lt;seanga2@gmail.com&gt;
Reviewed-by: Marek Vasut &lt;marek.vasut+renesas@mailbox.org&gt;
</content>
</entry>
<entry>
<title>clk: rockchip: rk3588: add hardcoded assigned clocks values</title>
<updated>2023-05-09T14:50:01Z</updated>
<author>
<name>Eugen Hristev</name>
<email>eugen.hristev@collabora.com</email>
</author>
<published>2023-04-13T11:36:45Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=716ed2a8c0bba085372df0eb7edb580b11e8d94c'/>
<id>urn:sha1:716ed2a8c0bba085372df0eb7edb580b11e8d94c</id>
<content type='text'>
The CRU is being probed with a default set of assigned clocks, which
are not implemented in the driver at all.
Hence, when clk_set_defaults is called, it fails with ENOENT.
This would not be a problem, as the CRU still handles all the required
clocks, and the assigned clocks are default configs which are preprogrammed
or not required for Uboot operations.
However, the rockchip reset driver is being bound by the same DT node
as CRU, as the reset driver has no DT node.
But, when probing the reset node, it will call again the clk_set_defaults
for the CRU node, and failing because of missing those specific clocks
in the rk3588 clock driver.
To avoid this, simply implement a basic set/get that will just return
success and the default corresponding rate for the required assigned clocks.
As those clocks were not supported in Uboot, not required for Uboot
operations, there is no need to do any different kind of initialization.

Signed-off-by: Eugen Hristev &lt;eugen.hristev@collabora.com&gt;
Reviewed-by: Kever Yang &lt;kever.yang@rock-chips.com&gt;
</content>
</entry>
<entry>
<title>clk: rockchip: correct trivial typo in debug message</title>
<updated>2023-05-09T10:28:44Z</updated>
<author>
<name>Eugen Hristev</name>
<email>eugen.hristev@collabora.com</email>
</author>
<published>2023-04-11T07:17:56Z</published>
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<id>urn:sha1:30850b691931d440b1d2335560e222971a3cfb82</id>
<content type='text'>
s/faile/failed in debug message

Signed-off-by: Eugen Hristev &lt;eugen.hristev@collabora.com&gt;
Reviewed-by: Kever Yang &lt;kever.yang@rock-chips.com&gt;
</content>
</entry>
<entry>
<title>drivers: fix debug string with fdt_addr_t input</title>
<updated>2023-05-06T09:28:18Z</updated>
<author>
<name>Johan Jonker</name>
<email>jbx6244@gmail.com</email>
</author>
<published>2023-03-13T00:32:57Z</published>
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<id>urn:sha1:84404d8165387d9bdb990458f3503d58fb1fd389</id>
<content type='text'>
The fdt_addr_t and phys_addr_t size have been decoupled. A 32bit CPU
can expect 64-bit data from the device tree parser, so fix some
debug strings with fdt_addr_t to be able to handle both sizes.

Signed-off-by: Johan Jonker &lt;jbx6244@gmail.com&gt;
Reviewed-by: Simon Glass &lt;sjg@chromium.org&gt;
</content>
</entry>
<entry>
<title>drivers: use devfdt_get_addr_ptr when cast to pointer</title>
<updated>2023-05-06T09:28:18Z</updated>
<author>
<name>Johan Jonker</name>
<email>jbx6244@gmail.com</email>
</author>
<published>2023-03-13T00:32:44Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=0d01046ea366842d4f01e693579c33229eb523d8'/>
<id>urn:sha1:0d01046ea366842d4f01e693579c33229eb523d8</id>
<content type='text'>
The fdt_addr_t and phys_addr_t size have been decoupled. A 32bit CPU
can expect 64-bit data from the device tree parser, so use
devfdt_get_addr_ptr instead of the devfdt_get_addr function in
the various files in the drivers directory that cast to a pointer.

Signed-off-by: Johan Jonker &lt;jbx6244@gmail.com&gt;
Reviewed-by: Simon Glass &lt;sjg@chromium.org&gt;
</content>
</entry>
<entry>
<title>drivers: use devfdt_get_addr_index_ptr when cast to pointer</title>
<updated>2023-05-06T09:28:18Z</updated>
<author>
<name>Johan Jonker</name>
<email>jbx6244@gmail.com</email>
</author>
<published>2023-03-13T00:32:31Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=320a1938b6f7ea1ad89f7e18c7fef5898f98fc5b'/>
<id>urn:sha1:320a1938b6f7ea1ad89f7e18c7fef5898f98fc5b</id>
<content type='text'>
The fdt_addr_t and phys_addr_t size have been decoupled. A 32bit CPU
can expect 64-bit data from the device tree parser, so use
devfdt_get_addr_index_ptr instead of the devfdt_get_addr_index function
in the various files in the drivers directory that cast to a pointer.
As we are there also streamline the error response to -EINVAL on return.

Signed-off-by: Johan Jonker &lt;jbx6244@gmail.com&gt;
Reviewed-by: Simon Glass &lt;sjg@chromium.org&gt;
</content>
</entry>
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