u-boot.git/drivers/clk, branch v2024.01 Unnamed repository; edit this file 'description' to name the repository. test: dm: clk_ccf: test ccf_clk_ops 2023-12-15T18:50:44+00:00 Yang Xiwen forbidden405@outlook.com 2023-12-15T18:28:52+00:00 d30618243990457d219ab81955c2738580d26cd2 Assign ccf_clk_ops to .ops of clk_ccf driver so that it can act as an clk provider. Also add "#clock-cells=<1>" to its device tree node. Add "i2c_root" to clk_test in the device tree and driver for testing. Get "i2c_root" clock in CCF unit tests and add tests for it. Signed-off-by: Yang Xiwen <forbidden405@outlook.com> Reviewed-by: Sean Anderson <seanga2@gmail.com> Link: https://lore.kernel.org/r/20231111-enable_count-v3-2-08a821892fa9@outlook.com 
Assign ccf_clk_ops to .ops of clk_ccf driver so that it can act as an
clk provider. Also add "#clock-cells=<1>" to its device tree node.

Add "i2c_root" to clk_test in the device tree and driver for testing.

Get "i2c_root" clock in CCF unit tests and add tests for it.

Signed-off-by: Yang Xiwen <forbidden405@outlook.com>
Reviewed-by: Sean Anderson <seanga2@gmail.com>
Link: https://lore.kernel.org/r/20231111-enable_count-v3-2-08a821892fa9@outlook.com
clk: Check that composite clock's div has set_rate() 2023-12-15T17:32:00+00:00 Igor Prusov ivprusov@salutedevices.com 2023-12-05T23:23:33+00:00 54d7da77306257a03231b04e7f2f9393ad7b0e46 It's possible for composite clocks to have a divider that does not implement set_rate() operation. For example, sandbox_clk_composite() registers composite clock with a divider that only has get_rate(). Currently clk_composite_set_rate() only checks thate rate_ops are present, so for sandbox it will cause NULL dereference during clk_set_rate(). This patch adds rate_ops->set_rate check tp clk_composite_set_rate(). Signed-off-by: Igor Prusov <ivprusov@salutedevices.com> Reviewed-by: Sean Anderson <seanga2@gmail.com> Link: https://lore.kernel.org/r/20231205232334.2931-2-ivprusov@salutedevices.com 
It's possible for composite clocks to have a divider that does not
implement set_rate() operation. For example, sandbox_clk_composite()
registers composite clock with a divider that only has get_rate().
Currently clk_composite_set_rate() only checks thate rate_ops are
present, so for sandbox it will cause NULL dereference during
clk_set_rate().

This patch adds rate_ops->set_rate check tp clk_composite_set_rate().

Signed-off-by: Igor Prusov <ivprusov@salutedevices.com>
Reviewed-by: Sean Anderson <seanga2@gmail.com>
Link: https://lore.kernel.org/r/20231205232334.2931-2-ivprusov@salutedevices.com
clk: get correct ops for clk_enable() and clk_disable() 2023-12-15T17:31:47+00:00 Yang Xiwen forbidden405@outlook.com 2023-11-18T22:10:06+00:00 3fb2d3d6acbaad50d2e638f6abb4e9d7a511c462 assign clk_dev_ops(clkp->dev) to ops to ensure correct clk operations are called on clocks. This fixes the incorrect enable_count issue as described in [1]. [1]: https://lore.kernel.org/all/SEZPR06MB695927A6DEEEF8489A06897396A7A@SEZPR06MB6959.apcprd06.prod.outlook.com/ Signed-off-by: Yang Xiwen <forbidden405@outlook.com> Reviewed-by: Sean Anderson <seanga2@gmail.com> Link: https://lore.kernel.org/r/20231111-enable_count-v2-2-20e3728600b5@outlook.com 
assign clk_dev_ops(clkp->dev) to ops to ensure correct clk operations
are called on clocks.

This fixes the incorrect enable_count issue as described in [1].

[1]: https://lore.kernel.org/all/SEZPR06MB695927A6DEEEF8489A06897396A7A@SEZPR06MB6959.apcprd06.prod.outlook.com/

Signed-off-by: Yang Xiwen <forbidden405@outlook.com>
Reviewed-by: Sean Anderson <seanga2@gmail.com>
Link: https://lore.kernel.org/r/20231111-enable_count-v2-2-20e3728600b5@outlook.com
clk: check parent_name in clk_register to avoid confusing log_error() output 2023-12-15T17:31:15+00:00 Yang Xiwen forbidden405@outlook.com 2023-11-10T19:19:52+00:00 09844d0de5550e7f91246031220074a80b5a821a For some gate clocks and fixed clocks without a parent, calling clk_register will print an useless error message indicating that parent is missing. Fix that by gaurding log_xxx() with an if-statement. Signed-off-by: Yang Xiwen <forbidden405@outlook.com> Suggested-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Sean Anderson <seanga2@gmail.com> Link: https://lore.kernel.org/r/20230807-clk-fix-v2-1-0b688e21fb4e@outlook.com 
For some gate clocks and fixed clocks without a parent, calling
clk_register will print an useless error message indicating that parent
is missing. Fix that by gaurding log_xxx() with an if-statement.

Signed-off-by: Yang Xiwen <forbidden405@outlook.com>
Suggested-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Sean Anderson <seanga2@gmail.com>
Link: https://lore.kernel.org/r/20230807-clk-fix-v2-1-0b688e21fb4e@outlook.com
clk: starfive: jh7110: Add watchdog clocks 2023-12-05T08:40:16+00:00 Chanho Park chanho61.park@samsung.com 2023-11-05T23:13:15+00:00 8ef2d7926f6973707164f4bd8f76bb94e80f336b Add JH7110_SYSCLK_WDT_APB and JH7110_SYSCLK_WDT_CORE clocks for JH7110 watchdog device. Signed-off-by: Chanho Park <chanho61.park@samsung.com> Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com> 
Add JH7110_SYSCLK_WDT_APB and JH7110_SYSCLK_WDT_CORE clocks for JH7110
watchdog device.

Signed-off-by: Chanho Park <chanho61.park@samsung.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
Merge branch 'master' of https://source.denx.de/u-boot/custodians/u-boot-samsung 2023-11-28T15:05:25+00:00 Tom Rini trini@konsulko.com 2023-11-28T15:05:25+00:00 b2bf18d5e584dd6d65b0b35de19354f9ac615808 






clk: exynos: Add header guard for clk-pll.h
2023-11-13T07:39:05+00:00

Sam Protsenko
semen.protsenko@linaro.org

2023-11-07T21:22:00+00:00

f655090901dce2a3890efb07c3f341d5b8bc2ae9

The clk-pll.h is going to be included in multiple files soon. Add
missing header guard to prevent possible build errors in future.

Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org>
Fixes: 166097e87753 ("clk: exynos: add clock driver for Exynos7420 Soc")
Reviewed-by: Sean Anderson <seanga2@gmail.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>





The clk-pll.h is going to be included in multiple files soon. Add
missing header guard to prevent possible build errors in future.

Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org>
Fixes: 166097e87753 ("clk: exynos: add clock driver for Exynos7420 Soc")
Reviewed-by: Sean Anderson <seanga2@gmail.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>







clk: sunxi: Use the right symbol in the Makefile
2023-11-12T16:46:16+00:00

Samuel Holland
samuel@sholland.org

2023-10-31T04:49:22+00:00

ca43266562461c3bd871da5adffecc46eb05dc56

CONFIG_ARCH_SUNXI will not be enabled for RISC-V SoCs using this driver.
Use the symbol for the driver itself instead.

Signed-off-by: Samuel Holland <samuel@sholland.org>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>





CONFIG_ARCH_SUNXI will not be enabled for RISC-V SoCs using this driver.
Use the symbol for the driver itself instead.

Signed-off-by: Samuel Holland <samuel@sholland.org>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>







tree-wide: Replace http:// link with https:// link for ti.com
2023-11-10T16:01:50+00:00

Nishanth Menon
nm@ti.com

2023-11-01T20:56:03+00:00

a94a4071d449e12c9fb5ac37d6362d22efcb27da

Replace instances of http://www.ti.com with https://www.ti.com

Signed-off-by: Nishanth Menon <nm@ti.com>





Replace instances of http://www.ti.com with https://www.ti.com

Signed-off-by: Nishanth Menon <nm@ti.com>







clk: a1: add new clocks for USB stack
2023-11-06T08:45:47+00:00

Alexey Romanov
avromanov@salutedevices.com

2023-11-01T14:04:56+00:00

8ec790399aa88bb8d0a02282e411f34584c74950

Since we sync device tree with Linux, we have to add this
clock definition for USB stack.

Signed-off-by: Alexey Romanov <avromanov@salutedevices.com>
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Link: https://lore.kernel.org/r/20231101140500.9025-2-avromanov@salutedevices.com
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>





Since we sync device tree with Linux, we have to add this
clock definition for USB stack.

Signed-off-by: Alexey Romanov <avromanov@salutedevices.com>
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Link: https://lore.kernel.org/r/20231101140500.9025-2-avromanov@salutedevices.com
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>