u-boot.git/drivers/clk, branch v2025.04 Unnamed repository; edit this file 'description' to name the repository. clk: sophgo: Fix return values of register updating helpers 2025-03-25T04:13:42+00:00 Yao Zi ziyao@disroot.org 2025-03-07T17:11:45+00:00 02933626c7351db6f38cd72d85b47188655fbc85 These helpers wrongly return the updated register value. As a non-zero value indicates failure, this causes various clock operations are considered failed. Correct the return value to constant zero, since these simple MMIO operations won't fail. This fixes clock enabling failures during booting process, In: serial@4140000 Out: serial@4140000 Err: serial@4140000 Net: Enable clock-controller@3002000 failed failed to enable clock 0 No ethernet found. which leads to misoperation of various peripherals. Fixes: 5f364e072e7 ("clk: sophgo: cv1800b: Add clock controller driver for cv1800b SoC") Tested-by: Yuguo Pei <purofle@gmail.com> Signed-off-by: Yao Zi <ziyao@disroot.org> 
These helpers wrongly return the updated register value. As a non-zero
value indicates failure, this causes various clock operations are
considered failed.

Correct the return value to constant zero, since these simple MMIO
operations won't fail. This fixes clock enabling failures during booting
process,

	In:    serial@4140000
	Out:   serial@4140000
	Err:   serial@4140000
	Net:   Enable clock-controller@3002000 failed
	failed to enable clock 0
	No ethernet found.

which leads to misoperation of various peripherals.

Fixes: 5f364e072e7 ("clk: sophgo: cv1800b: Add clock controller driver for cv1800b SoC")
Tested-by: Yuguo Pei <purofle@gmail.com>
Signed-off-by: Yao Zi <ziyao@disroot.org>
clk: versal: Store driver data in data section 2025-03-03T15:09:59+00:00 Padmarao Begari padmarao.begari@amd.com 2025-02-18T05:24:19+00:00 96f47ae89a4ce16a59c14d229ff707bdeb1064f4 Line 171 in README is describing that before relocation no code should use global variable because global variables are placed to BSS section which is initialized to 0 after relocation. On Versal platforms clock driver is initialized before relocation (via using dm,bootph-all flag in DT) and global variables are initialized which works if this is used only before relocation. But the variables are used after relocation too but values are zeroed which is ending up incorrect behavior. That's why place variables to data section to ensure that values are not cleared which is for now the quickest temporary solution. The correct way to do it is to move all global variables to private data to avoid it. Signed-off-by: Padmarao Begari <padmarao.begari@amd.com> Link: https://lore.kernel.org/r/20250218052419.1141139-1-padmarao.begari@amd.com Signed-off-by: Michal Simek <michal.simek@amd.com> 
Line 171 in README is describing that before relocation
no code should use global variable because global variables
are placed to BSS section which is initialized to 0 after
relocation.

On Versal platforms clock driver is initialized before
relocation (via using dm,bootph-all flag in DT) and global
variables are initialized which works if this is used only
before relocation. But the variables are used after
relocation too but values are zeroed which is ending up
incorrect behavior.

That's why place variables to data section to ensure that
values are not cleared which is for now the quickest
temporary solution. The correct way to do it is to move
all global variables to private data to avoid it.

Signed-off-by: Padmarao Begari <padmarao.begari@amd.com>
Link: https://lore.kernel.org/r/20250218052419.1141139-1-padmarao.begari@amd.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
clk: versal: Update the reference clocks as per bindings 2025-03-03T12:29:57+00:00 Venkatesh Yadav Abbarapu venkatesh.abbarapu@amd.com 2025-02-06T09:15:33+00:00 a7670e6c5b0e90039ec71e2377f37ef5a5ad5ded As per the bindings the reference clocks naming has changed from "pl_alt_ref_clk" to "pl_alt_ref" and "ref_clk" to "ref". Update the same in the clock driver. Also add the fallback option for older DT bindings. Signed-off-by: Venkatesh Yadav Abbarapu <venkatesh.abbarapu@amd.com> Link: https://lore.kernel.org/r/20250206091533.1447234-1-venkatesh.abbarapu@amd.com Signed-off-by: Michal Simek <michal.simek@amd.com> 
As per the bindings the reference clocks naming has changed
from "pl_alt_ref_clk" to "pl_alt_ref" and "ref_clk" to "ref".
Update the same in the clock driver. Also add the fallback option
for older DT bindings.

Signed-off-by: Venkatesh Yadav Abbarapu <venkatesh.abbarapu@amd.com>
Link: https://lore.kernel.org/r/20250206091533.1447234-1-venkatesh.abbarapu@amd.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
clk: rockchip: Correct usage of IS_ENABLED() macro 2025-02-28T11:14:35+00:00 Tom Rini trini@konsulko.com 2025-02-26T20:31:23+00:00 126262b2bebe29bec9b0800844f4acc0ffc29626 These two files were using IS_ENABLED() to test for CONFIG flags but omitted the CONFIG_ prefix and so did not work as expected. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com> 
These two files were using IS_ENABLED() to test for CONFIG flags but omitted
the CONFIG_ prefix and so did not work as expected.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
clk: stub: add sm8150 compatible id 2025-02-26T13:16:40+00:00 Julius Lehmann lehmanju@devpi.de 2025-02-10T16:27:27+00:00 506f6a384c335e86c4812c5e734dea4eabc21130 Add support for sm8150 clock controller to clk stub driver. Signed-off-by: Julius Lehmann <lehmanju@devpi.de> Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org> 
Add support for sm8150 clock controller to clk stub driver.

Signed-off-by: Julius Lehmann <lehmanju@devpi.de>
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
clk: add stub clock driver 2025-02-26T13:16:40+00:00 Caleb Connolly caleb.connolly@linaro.org 2025-02-10T16:27:25+00:00 d31a3bd08ed46c51cdc5f5f126f2a721c5425bfb Add a stub clock driver which can be used to bind clock controllers which aren't required for the platform to boot, but which are needed for U-Boot drivers to work. In addition, add a NOP parent driver to allow for binding the parent nodes of the clock. Initially this driver supports a Qualcomm platform where the MMC driver tries to fetch the RPM clock controller, which is not actually required for the device to work. Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org> Acked-by: Ilias Apalodimas <ilias.apalodimas@linaro.org> Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org> 
Add a stub clock driver which can be used to bind clock controllers
which aren't required for the platform to boot, but which are needed for
U-Boot drivers to work.

In addition, add a NOP parent driver to allow for binding the parent
nodes of the clock.

Initially this driver supports a Qualcomm platform where the MMC driver
tries to fetch the RPM clock controller, which is not actually required
for the device to work.

Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Acked-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
Merge tag 'u-boot-stm32-20250131' of https://source.denx.de/u-boot/custodians/u-boot-stm 2025-01-31T14:32:11+00:00 Tom Rini trini@konsulko.com 2025-01-31T14:32:11+00:00 a582e485338633fb2bd3b124a06da1254b71947c STM32 MPU: - Remove dt-bindings headers available in dts/upstream - Fixes for stm32prog - Enable CONFIG_SYS_64BIT_LBA for STM32MP15/13/25 defconfigs - Add upport of ck_usbo_48m in pre-reloc stage for STM32MP13 - Clean env_get_location() for STM32MP1 - Fix board_get_usable_ram_top() to fix infinite loop in cache management for STM32MP2. - Fix ck_flexgen_08 frequency for STM32MP2 STM32 MCU: - Tune CYCLIC_MAX_CPU_TIME_US to avoid cyclic warning for STM32F469-Disco - Tune CYCLIC_MAX_CPU_TIME_US to avoid cyclic warning for STM32F769-Disco 
STM32 MPU:
- Remove dt-bindings headers available in dts/upstream
- Fixes for stm32prog
- Enable CONFIG_SYS_64BIT_LBA for STM32MP15/13/25 defconfigs
- Add upport of ck_usbo_48m in pre-reloc stage for STM32MP13
- Clean env_get_location() for STM32MP1
- Fix board_get_usable_ram_top() to fix infinite loop in cache
  management for STM32MP2.
- Fix ck_flexgen_08 frequency for STM32MP2

STM32 MCU:
- Tune CYCLIC_MAX_CPU_TIME_US to avoid cyclic warning for STM32F469-Disco
- Tune CYCLIC_MAX_CPU_TIME_US to avoid cyclic warning for STM32F769-Disco
stm32: remove dt-binding headers that are available upstream 2025-01-31T07:46:51+00:00 Patrick Delaunay patrick.delaunay@foss.st.com 2024-11-27T16:23:09+00:00 2599223fa75021a5fc922c010e3bd6542859d45a Some dt-binding headers mask the upstream ones which can lead to build failures, or worse: super weird bugs, if they get out of sync. Remove these headers so our devicetree and binding headers will both be in sync with upstream. Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com> Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com> 
Some dt-binding headers mask the upstream ones which can lead to build
failures, or worse: super weird bugs, if they get out of sync.

Remove these headers so our devicetree and binding headers will both be
in sync with upstream.

Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
clk: mediatek: add clock driver support for MediaTek MT7987 SoC 2025-01-30T20:35:14+00:00 Weijie Gao weijie.gao@mediatek.com 2025-01-23T08:54:47+00:00 ece4e5804f52a42271e21306c738f2bb4736bf2b This patch adds clock driver support for MediaTek MT7987 SoC Signed-off-by: Sam Shih <sam.shih@mediatek.com> Signed-off-by: Weijie Gao <weijie.gao@mediatek.com> 
This patch adds clock driver support for MediaTek MT7987 SoC

Signed-off-by: Sam Shih <sam.shih@mediatek.com>
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
clk: mediatek: fix uninitialized fields issue in INFRA_MUX struct 2025-01-23T18:11:49+00:00 Weijie Gao weijie.gao@mediatek.com 2025-01-17T09:16:38+00:00 b033dfb21df8ae876ec69d84bc8c5fafd7aa8ced This patch adds missing initialization of fields in INFRA_MUX struct which caused uart broken after any other infra mux being enabled by 'clk_prepare_enable' Signed-off-by: Sam Shih <sam.shih@mediatek.com> Signed-off-by: Weijie Gao <weijie.gao@mediatek.com> 
This patch adds missing initialization of fields in INFRA_MUX struct
which caused uart broken after any other infra mux being enabled by
'clk_prepare_enable'

Signed-off-by: Sam Shih <sam.shih@mediatek.com>
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>