u-boot.git/drivers/clk, branch v2026.07

clk/qcom: milos: Add TCSRCC clocks

2026-06-30T11:04:59Z

With a recent change to the UFS driver, now all clocks need to be available. Add all the clocks from the TCSRCC block on Milos. Signed-off-by: Luca Weiss Reviewed-by: Casey Connolly Link: https://patch.msgid.link/20260625-milos-ufs-fix-v1-2-b0923dabc35f@fairphone.com Signed-off-by: Casey Connolly

clk/qcom: milos: Add remaining UFS clocks

2026-06-30T11:04:59Z

With a recent change to the UFS driver, now all clocks need to be available. Add them. Signed-off-by: Luca Weiss Reviewed-by: Casey Connolly Link: https://patch.msgid.link/20260625-milos-ufs-fix-v1-1-b0923dabc35f@fairphone.com Signed-off-by: Casey Connolly

clk: imx: imx8mq: Fix iMX8MQ PLL issue

2026-06-27T17:53:01Z

The fractional PLL used on iMX8MQ is not pll14xx, it is different PLL and not exist in u-boot. Add this fractional PLL driver and update iMX8MQ clock driver to adapt this fraction PLL. Fixes: 11c8ab01f3ed ("clk: imx8mq: Add a clock driver for the imx8mq") Signed-off-by: Ye Li Reviewed-by: Peng Fan

rockchip: clk: clk_rk3576: Add support for RK3576 GMAC 25MHz clock output

2026-06-09T16:19:05Z

Rockchip RK3576 SoC has two built-in GMACs which connect to external PHYs via RGMII interface. The RGMII link can be clocked by either the PHY or the SoC. When the SoC is the master, as is the case on the RK3576 EVB1, the output clock needs to be configured in the CRU. Add the respective logic for getting and setting the RGMII reference clock output for both GMAC0 and GMAC1. Signed-off-by: Alexey Charkov Reviewed-by: Quentin Schulz Reviewed-by: Kever Yang

clk: rockchip: rk3576: Add CLK_REF_USB3OTGx support

2026-06-08T13:21:52Z

The CLK_REF_USB3OTGx clocks are used as reference clocks for the two DWC3 blocks. Add simple support to get rate of CLK_REF_USB3OTGx clocks to fix reference clock period configuration. Signed-off-by: Jonas Karlman Reviewed-by: Kever Yang

clk: rockchip: rk3528: Add CLK_REF_USB3OTG support

2026-06-08T13:21:52Z

The CLK_REF_USB3OTG clock is used as reference clock for the DWC3 block. Add simple support to get rate of CLK_REF_USB3OTG clock to fix reference clock period configuration. Signed-off-by: Jonas Karlman Reviewed-by: Kever Yang

clk: renesas: Add Renesas R-Car R8A78000 X5H CPG clock driver

2026-05-21T19:48:05Z

Add Renesas R-Car R8A78000 X5H CPG clock driver, which serves as a remap driver between DT clock IDs and SCMI clock IDs in case U-Boot runs on the Cortex-A, and as a trivial clock driver for RSIP. The R-Car X5H SCP firmware uses different SCMI clock IDs in different versions of the SCP firmware, which makes this remapping necessary. The SCMI base protocol version is updated for each new SCP firmware version, it is therefore possible to determine which SCP firmware version is running on the platform from the base protocol and then determine which remapping table to use for DT clock ID to SCMI clock ID remapping. Currently supported versions are SCP 4.28, 4.31, 4.32 . The DT clock ID to SCMI clock ID remap and call mechanism is a bit complex. The driver looks up the SCMI clock protocol device on probe and stores pointer to it in private data. On each clock request which has to be remapped, the device sequence ID of this SCMI clock protocol device is incremented by the remapped SCMI clock ID + 1 and used to look up matching clock device by sequence number. If the device is found, it is converted to clock, which can be used in regular clock operations. This look up has to be done because the SCMI clock driver registers a subdevice for each clock, and this look up is the only way to find the correct SCMI clock subdevice. Since the SCMI device and the clock subdevices are registered in the same function, we can depend on the device sequence numbers to be monotonically incrementing, with SCMI clock protocol device being sequence number N, the first SCMI clock subdevice being sequence number N+1 and so on. In case of RSIP, all clocks are already enabled by BootROM or early SoC initialization code, the driver therefore only acts as a stub. Signed-off-by: Marek Vasut

clk: stm32: Add STM32MP23 support

2026-04-30T06:01:11Z

Add STM32MP23 support. Signed-off-by: Patrice Chotard Reviewed-by: Raphaël Gallais-Pou

Merge branch 'casey/qcom-main-13Apr2026' of https://source.denx.de/u-boot/custodians/u-boot-snapdragon

2026-04-27T14:05:40Z

Various Qualcomm additions this cycle: * USB superspeed support for 1 platform * Initial support for the Milos platform and the Fairphone Gen 6 (chainloaded from ABL) * Improved support for booting with OP-TEE on supported platforms * Initial basic power domain support Notably there is a generic change to the device core, missing power domains will no longer cause a device to fail probe and instead will just print a warning. This shouldn't affect any existing platforms.

Merge tag 'u-boot-amlogic-next-20260427' of https://source.denx.de/u-boot/custodians/u-boot-amlogic

2026-04-27T14:04:06Z

- enable EFI Capsule on Disk (+ sysreset fixup/cleanup) - do not fail when setting SD_EMMC_x_CLK0 on GX/G12