u-boot.git/drivers/cpu/riscv_cpu.c, branch v2020.10 Unnamed repository; edit this file 'description' to name the repository. cpu: Convert the methods to use a const udevice * 2020-07-25T20:46:57+00:00 Simon Glass sjg@chromium.org 2020-01-27T05:06:27+00:00 961420fa5f3bcf837518e7f72d6f8c3ee090643d These functions should not modify the device. Convert them to const so that callers don't need to cast if they have a const udevice *. Signed-off-by: Simon Glass <sjg@chromium.org> 
These functions should not modify the device. Convert them to const so
that callers don't need to cast if they have a const udevice *.

Signed-off-by: Simon Glass <sjg@chromium.org>
Revert "Merge tag 'dm-pull-20jul20' of git://git.denx.de/u-boot-dm" 2020-07-24T12:42:06+00:00 Tom Rini trini@konsulko.com 2020-07-24T12:42:06+00:00 7208396bbf1df1c7a85d263b7ff054e6b45d8240 This reverts commit 5d3a21df6694ebd66d5c34c9d62a26edc7456fc7, reversing changes made to 56d37f1c564107e27d873181d838571b7d7860e7. Unfortunately this is causing CI failures: https://travis-ci.org/github/trini/u-boot/jobs/711313649 Signed-off-by: Tom Rini <trini@konsulko.com> 
This reverts commit 5d3a21df6694ebd66d5c34c9d62a26edc7456fc7, reversing
changes made to 56d37f1c564107e27d873181d838571b7d7860e7.

Unfortunately this is causing CI failures:
https://travis-ci.org/github/trini/u-boot/jobs/711313649

Signed-off-by: Tom Rini <trini@konsulko.com>
cpu: Convert the methods to use a const udevice * 2020-07-20T17:37:47+00:00 Simon Glass sjg@chromium.org 2020-01-27T05:06:27+00:00 f07e58b878fc18bd69d2c19075f0fb8d7d35da00 These functions should not modify the device. Convert them to const so that callers don't need to cast if they have a const udevice *. Signed-off-by: Simon Glass <sjg@chromium.org> 
These functions should not modify the device. Convert them to const so
that callers don't need to cast if they have a const udevice *.

Signed-off-by: Simon Glass <sjg@chromium.org>
riscv: cpu: check and append L1 cache to cpu features 2020-07-01T07:01:27+00:00 Sagar Shrikant Kadam sagar.kadam@sifive.com 2020-06-28T14:45:03+00:00 add0dc1f7de91112d9e738f9482b09b75fa86acb All cpu cores within FU540-C000 having split I/D caches. Set the L1 cache feature bit using the i-cache-size or d-cache-size as one of the property from device tree indicating that L1 cache is present on the cpu core. => cpu detail 1: cpu@1 rv64imafdc ID = 1, freq = 999.100 MHz: L1 cache, MMU 2: cpu@2 rv64imafdc ID = 2, freq = 999.100 MHz: L1 cache, MMU 3: cpu@3 rv64imafdc ID = 3, freq = 999.100 MHz: L1 cache, MMU 4: cpu@4 rv64imafdc ID = 4, freq = 999.100 MHz: L1 cache, MMU Signed-off-by: Sagar Shrikant Kadam <sagar.kadam@sifive.com> Reviewed-by: Pragnesh Patel <Pragnesh.patel@sifive.com> Reviewed-by: Bin Meng <bin.meng@windriver.com> 
All cpu cores within FU540-C000 having split I/D caches.
Set the L1 cache feature bit using the i-cache-size or d-cache-size
as one of the property from device tree indicating that L1 cache is
present on the cpu core.

=> cpu detail
  1: cpu@1      rv64imafdc
        ID = 1, freq = 999.100 MHz: L1 cache, MMU
  2: cpu@2      rv64imafdc
        ID = 2, freq = 999.100 MHz: L1 cache, MMU
  3: cpu@3      rv64imafdc
        ID = 3, freq = 999.100 MHz: L1 cache, MMU
  4: cpu@4      rv64imafdc
        ID = 4, freq = 999.100 MHz: L1 cache, MMU

Signed-off-by: Sagar Shrikant Kadam <sagar.kadam@sifive.com>
Reviewed-by: Pragnesh Patel <Pragnesh.patel@sifive.com>
Reviewed-by: Bin Meng <bin.meng@windriver.com>
riscv: cpu: correctly handle the setting of CPU_FEAT_MMU bit 2020-07-01T07:01:27+00:00 Sagar Shrikant Kadam sagar.kadam@sifive.com 2020-06-28T14:45:02+00:00 b6b233ddb78205abc76dde60179bd129368dc3e8 The conditional check to read "mmu-type" from the device tree is not rightly handled due to which the cpu feature doesn't include CPU_FEAT_MMU even if it's corresponding entry is present in the device tree. The initialization of cpu features is now taken care in cpu-uclass driver, so no need to zero out cpu_freq in riscv_cpu driver and can be removed. Signed-off-by: Sagar Shrikant Kadam <sagar.kadam@sifive.com> Reviewed-by: Pragnesh Patel <pragnesh.patel@sifive.com> Reviewed-by: Bin Meng <bin.meng@windriver.com> 
The conditional check to read "mmu-type" from the device tree
is not rightly handled due to which the cpu feature doesn't include
CPU_FEAT_MMU even if it's corresponding entry is present in the device
tree.

The initialization of cpu features is now taken care in cpu-uclass
driver, so no need to zero out cpu_freq in riscv_cpu driver and can be
removed.

Signed-off-by: Sagar Shrikant Kadam <sagar.kadam@sifive.com>
Reviewed-by: Pragnesh Patel <pragnesh.patel@sifive.com>
Reviewed-by: Bin Meng <bin.meng@windriver.com>
riscv: Enable cpu clock if it is present 2020-07-01T07:01:22+00:00 Sean Anderson seanga2@gmail.com 2020-06-24T10:41:22+00:00 627718626b05f715da555cc005426ab10f44bb98 The cpu clock is probably already enabled if we are executing code (though we could be executing from a different core). This patch prevents the cpu clock or its parents from being disabled. Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> 
The cpu clock is probably already enabled if we are executing code (though
we could be executing from a different core). This patch prevents the cpu
clock or its parents from being disabled.

Signed-off-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
riscv: Try to get cpu frequency from a "clocks" node if it exists 2020-07-01T07:01:22+00:00 Sean Anderson seanga2@gmail.com 2020-06-24T10:41:21+00:00 ab24017a19b482d9026d21a2ec03416c5c4a388d Instead of always using the "clock-frequency" property to determine cpu frequency, try using a clock in "clocks" if it exists. This patch also fixes a bug where there could be spurious higher frequencies if sizeof(u32) != sizeof(ulong). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> 
Instead of always using the "clock-frequency" property to determine cpu
frequency, try using a clock in "clocks" if it exists. This patch also
fixes a bug where there could be spurious higher frequencies if sizeof(u32)
!= sizeof(ulong).

Signed-off-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
common: Drop linux/bitops.h from common header 2020-05-19T01:19:23+00:00 Simon Glass sjg@chromium.org 2020-05-10T17:40:13+00:00 cd93d625fd751d55c729c78b10f82109d56a5f1d Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org> 
Move this uncommon header out of the common header.

Signed-off-by: Simon Glass <sjg@chromium.org>
common: Drop log.h from common header 2020-05-19T01:19:18+00:00 Simon Glass sjg@chromium.org 2020-05-10T17:40:05+00:00 f7ae49fc4f363a803dab3be078e93ead8e75a8e9 Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org> 
Move this header out of the common header.

Signed-off-by: Simon Glass <sjg@chromium.org>
riscv: cpu: Skip unavailable hart in the get_count() op 2019-09-03T01:29:43+00:00 Bin Meng bmeng.cn@gmail.com 2019-08-08T07:52:08+00:00 4dfea4b5cd68b86dd47d1333f1871a402087deaa We should not count in hart that is marked as not available in the device tree in riscv_cpu_get_count(). Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Rick Chen <rick@andestech.com> Reviewed-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de> 
We should not count in hart that is marked as not available in the
device tree in riscv_cpu_get_count().

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Rick Chen <rick@andestech.com>
Reviewed-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>