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<title>u-boot.git/drivers/cpu/riscv_cpu.c, branch v2023.07.01</title>
<subtitle>Unnamed repository; edit this file 'description' to name the repository.</subtitle>
<id>http://cgit.235523.xyz/u-boot.git/atom/drivers/cpu/riscv_cpu.c?h=v2023.07.01</id>
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<updated>2022-09-29T20:11:31Z</updated>
<entry>
<title>dm: core: Drop ofnode_is_available()</title>
<updated>2022-09-29T20:11:31Z</updated>
<author>
<name>Simon Glass</name>
<email>sjg@chromium.org</email>
</author>
<published>2022-09-07T02:27:17Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=8909066199281b86bf4ee7673ec6d7983dd12a26'/>
<id>urn:sha1:8909066199281b86bf4ee7673ec6d7983dd12a26</id>
<content type='text'>
This function is also available as ofnode_is_enabled(), so use that
instead.

Signed-off-by: Simon Glass &lt;sjg@chromium.org&gt;
</content>
</entry>
<entry>
<title>common: Drop asm/global_data.h from common header</title>
<updated>2021-02-02T20:33:42Z</updated>
<author>
<name>Simon Glass</name>
<email>sjg@chromium.org</email>
</author>
<published>2020-10-31T03:38:53Z</published>
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<id>urn:sha1:401d1c4f5d2d29c4bc4beaec95402ca23eb63295</id>
<content type='text'>
Move this out of the common header and include it only where needed.  In
a number of cases this requires adding "struct udevice;" to avoid adding
another large header or in other cases replacing / adding missing header
files that had been pulled in, very indirectly.   Finally, we have a few
cases where we did not need to include &lt;asm/global_data.h&gt; at all, so
remove that include.

Signed-off-by: Simon Glass &lt;sjg@chromium.org&gt;
Signed-off-by: Tom Rini &lt;trini@konsulko.com&gt;
</content>
</entry>
<entry>
<title>dm: treewide: Rename ..._platdata variables to just ..._plat</title>
<updated>2020-12-13T23:51:09Z</updated>
<author>
<name>Simon Glass</name>
<email>sjg@chromium.org</email>
</author>
<published>2020-12-03T23:55:23Z</published>
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<id>urn:sha1:8a8d24bdf174851ebb8607f359d54b72e3283b97</id>
<content type='text'>
Try to maintain some consistency between these variables by using _plat as
a suffix for them.

Signed-off-by: Simon Glass &lt;sjg@chromium.org&gt;
</content>
</entry>
<entry>
<title>dm: treewide: Rename 'platdata' variables to just 'plat'</title>
<updated>2020-12-13T23:51:08Z</updated>
<author>
<name>Simon Glass</name>
<email>sjg@chromium.org</email>
</author>
<published>2020-12-03T23:55:18Z</published>
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<id>urn:sha1:caa4daa2ae3dc0a3e516addea5772c9af76abcb0</id>
<content type='text'>
We use 'priv' for private data but often use 'platdata' for platform data.
We can't really use 'pdata' since that is ambiguous (it could mean private
or platform data).

Rename some of the latter variables to end with 'plat' for consistency.

Signed-off-by: Simon Glass &lt;sjg@chromium.org&gt;
</content>
</entry>
<entry>
<title>cpu: Convert the methods to use a const udevice *</title>
<updated>2020-07-25T20:46:57Z</updated>
<author>
<name>Simon Glass</name>
<email>sjg@chromium.org</email>
</author>
<published>2020-01-27T05:06:27Z</published>
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<id>urn:sha1:961420fa5f3bcf837518e7f72d6f8c3ee090643d</id>
<content type='text'>
These functions should not modify the device. Convert them to const so
that callers don't need to cast if they have a const udevice *.

Signed-off-by: Simon Glass &lt;sjg@chromium.org&gt;
</content>
</entry>
<entry>
<title>Revert "Merge tag 'dm-pull-20jul20' of git://git.denx.de/u-boot-dm"</title>
<updated>2020-07-24T12:42:06Z</updated>
<author>
<name>Tom Rini</name>
<email>trini@konsulko.com</email>
</author>
<published>2020-07-24T12:42:06Z</published>
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<id>urn:sha1:7208396bbf1df1c7a85d263b7ff054e6b45d8240</id>
<content type='text'>
This reverts commit 5d3a21df6694ebd66d5c34c9d62a26edc7456fc7, reversing
changes made to 56d37f1c564107e27d873181d838571b7d7860e7.

Unfortunately this is causing CI failures:
https://travis-ci.org/github/trini/u-boot/jobs/711313649

Signed-off-by: Tom Rini &lt;trini@konsulko.com&gt;
</content>
</entry>
<entry>
<title>cpu: Convert the methods to use a const udevice *</title>
<updated>2020-07-20T17:37:47Z</updated>
<author>
<name>Simon Glass</name>
<email>sjg@chromium.org</email>
</author>
<published>2020-01-27T05:06:27Z</published>
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<id>urn:sha1:f07e58b878fc18bd69d2c19075f0fb8d7d35da00</id>
<content type='text'>
These functions should not modify the device. Convert them to const so
that callers don't need to cast if they have a const udevice *.

Signed-off-by: Simon Glass &lt;sjg@chromium.org&gt;
</content>
</entry>
<entry>
<title>riscv: cpu: check and append L1 cache to cpu features</title>
<updated>2020-07-01T07:01:27Z</updated>
<author>
<name>Sagar Shrikant Kadam</name>
<email>sagar.kadam@sifive.com</email>
</author>
<published>2020-06-28T14:45:03Z</published>
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<id>urn:sha1:add0dc1f7de91112d9e738f9482b09b75fa86acb</id>
<content type='text'>
All cpu cores within FU540-C000 having split I/D caches.
Set the L1 cache feature bit using the i-cache-size or d-cache-size
as one of the property from device tree indicating that L1 cache is
present on the cpu core.

=&gt; cpu detail
  1: cpu@1      rv64imafdc
        ID = 1, freq = 999.100 MHz: L1 cache, MMU
  2: cpu@2      rv64imafdc
        ID = 2, freq = 999.100 MHz: L1 cache, MMU
  3: cpu@3      rv64imafdc
        ID = 3, freq = 999.100 MHz: L1 cache, MMU
  4: cpu@4      rv64imafdc
        ID = 4, freq = 999.100 MHz: L1 cache, MMU

Signed-off-by: Sagar Shrikant Kadam &lt;sagar.kadam@sifive.com&gt;
Reviewed-by: Pragnesh Patel &lt;Pragnesh.patel@sifive.com&gt;
Reviewed-by: Bin Meng &lt;bin.meng@windriver.com&gt;
</content>
</entry>
<entry>
<title>riscv: cpu: correctly handle the setting of CPU_FEAT_MMU bit</title>
<updated>2020-07-01T07:01:27Z</updated>
<author>
<name>Sagar Shrikant Kadam</name>
<email>sagar.kadam@sifive.com</email>
</author>
<published>2020-06-28T14:45:02Z</published>
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<id>urn:sha1:b6b233ddb78205abc76dde60179bd129368dc3e8</id>
<content type='text'>
The conditional check to read "mmu-type" from the device tree
is not rightly handled due to which the cpu feature doesn't include
CPU_FEAT_MMU even if it's corresponding entry is present in the device
tree.

The initialization of cpu features is now taken care in cpu-uclass
driver, so no need to zero out cpu_freq in riscv_cpu driver and can be
removed.

Signed-off-by: Sagar Shrikant Kadam &lt;sagar.kadam@sifive.com&gt;
Reviewed-by: Pragnesh Patel &lt;pragnesh.patel@sifive.com&gt;
Reviewed-by: Bin Meng &lt;bin.meng@windriver.com&gt;
</content>
</entry>
<entry>
<title>riscv: Enable cpu clock if it is present</title>
<updated>2020-07-01T07:01:22Z</updated>
<author>
<name>Sean Anderson</name>
<email>seanga2@gmail.com</email>
</author>
<published>2020-06-24T10:41:22Z</published>
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<id>urn:sha1:627718626b05f715da555cc005426ab10f44bb98</id>
<content type='text'>
The cpu clock is probably already enabled if we are executing code (though
we could be executing from a different core). This patch prevents the cpu
clock or its parents from being disabled.

Signed-off-by: Sean Anderson &lt;seanga2@gmail.com&gt;
Reviewed-by: Bin Meng &lt;bmeng.cn@gmail.com&gt;
</content>
</entry>
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