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<title>u-boot.git/drivers/cpu, branch next</title>
<subtitle>Unnamed repository; edit this file 'description' to name the repository.</subtitle>
<id>http://cgit.235523.xyz/u-boot.git/atom/drivers/cpu?h=next</id>
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<updated>2026-06-29T21:29:44Z</updated>
<entry>
<title>treewide: Staticize and constify acpi ops</title>
<updated>2026-06-29T21:29:44Z</updated>
<author>
<name>Marek Vasut</name>
<email>marek.vasut+renesas@mailbox.org</email>
</author>
<published>2026-06-12T02:05:38Z</published>
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<id>urn:sha1:d5046398433e48e7b0b664c1ee3e4e2af6f861a8</id>
<content type='text'>
Set the acpi_ops structure as static const where applicable. The
The structure is not accessible from outside of drivers and is not
going to be modified at runtime. The structure may be unused in a
couple of drivers depending on their configuration, mark those
sites with __maybe_unused .

Signed-off-by: Marek Vasut &lt;marek.vasut+renesas@mailbox.org&gt;
Reviewed-by: Simon Glass &lt;sjg@chromium.org&gt;
</content>
</entry>
<entry>
<title>imx9: scmi: Print CPU part number name</title>
<updated>2026-06-09T16:06:43Z</updated>
<author>
<name>Ye Li</name>
<email>ye.li@nxp.com</email>
</author>
<published>2026-06-03T05:51:57Z</published>
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<id>urn:sha1:d62b91463b38165fd5a2bb6cb5b6f0c1c09fa91e</id>
<content type='text'>
Decode the CPU part number from PART_NUM fuse and print it in CPU name.

For iMX95 and iMX952 Part number fuse is defined as:
[7:6] : Package description
[5:2] : Segment
[1:0] : Number of A55 cores

For iMX94, the PART_NUM[7:0] fuse directly reflects the
part number value.

Signed-off-by: Ye Li &lt;ye.li@nxp.com&gt;
Acked-by: Peng Fan &lt;peng.fan@nxp.com&gt;
Signed-off-by: Peng Fan &lt;peng.fan@nxp.com&gt;
</content>
</entry>
<entry>
<title>Merge tag 'v2026.07-rc4' into next</title>
<updated>2026-06-08T21:28:18Z</updated>
<author>
<name>Tom Rini</name>
<email>trini@konsulko.com</email>
</author>
<published>2026-06-08T21:28:18Z</published>
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<id>urn:sha1:e91911169bc737ee4a79963a1cba8db2aab7c1c0</id>
<content type='text'>
Prepare v2026.07-rc4
</content>
</entry>
<entry>
<title>cpu: imx8_cpu: fix the mpidr check</title>
<updated>2026-06-05T15:57:02Z</updated>
<author>
<name>Peng Fan</name>
<email>peng.fan@nxp.com</email>
</author>
<published>2026-06-05T09:51:07Z</published>
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<id>urn:sha1:3782bf8a0ad1abee3a2a537b9180b63d7ed22d40</id>
<content type='text'>
The mpidr's type is u32, however dev_read_addr returns a value with type
fdt_addr_t(phys_addr_t) which is 64bit long. So the check never fail.

This patch we still keep mpidr as u32 type, because i.MX8 only has max
two cluster, the higher 32bit will always be 0. Use a variable addr
to do the check, if check pass, assign the lower 32 bit to plat-&gt;mpidr.

Signed-off-by: Peng Fan &lt;peng.fan@nxp.com&gt;
Signed-off-by: Ye Li &lt;ye.li@nxp.com&gt;
</content>
</entry>
<entry>
<title>cpu: imx8_cpu: Add iMX8MP UltraLite Part cpu type</title>
<updated>2026-06-05T15:57:02Z</updated>
<author>
<name>Ye Li</name>
<email>ye.li@nxp.com</email>
</author>
<published>2026-06-05T09:51:06Z</published>
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<id>urn:sha1:d0a62df75337cd5e44275c51b77383df9db9a339</id>
<content type='text'>
iMX8MP UltraLite part is missed in the cpu type print

Signed-off-by: Ye Li &lt;ye.li@nxp.com&gt;
Acked-by: Peng Fan &lt;peng.fan@nxp.com&gt;
</content>
</entry>
<entry>
<title>arm: imx8mp: Add new variant parts support</title>
<updated>2026-06-05T12:00:00Z</updated>
<author>
<name>Ye Li</name>
<email>ye.li@nxp.com</email>
</author>
<published>2026-05-22T13:50:15Z</published>
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<id>urn:sha1:dfd83eab76c4ca01732e8782dc815595bd9548fa</id>
<content type='text'>
iMX8MP added 4 new variant parts for low cost industrial and HMI.
The parts disabled HIFI DSP and ISP while other functions are enabled.

Part number:
  - MIMX8ML2DVNLZAB and MIMX8ML2CVNKZAB (2-core)
  - MIMX8ML5DVNLZAB and MIMX8ML5CVNKZAB (4-core)

Signed-off-by: Ye Li &lt;ye.li@nxp.com&gt;
</content>
</entry>
<entry>
<title>cpu: imx8_cpu: Fix CPU segment information print</title>
<updated>2026-06-04T20:25:22Z</updated>
<author>
<name>Ye Li</name>
<email>ye.li@nxp.com</email>
</author>
<published>2026-05-22T13:51:42Z</published>
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<id>urn:sha1:cdb9e79056dcc94440202845a75a31e4e40cc3a2</id>
<content type='text'>
Should not use CONFIG_IMX_TMU to determine the print of CPU market
segment information. Only iMX8 platforms don't have segment fuse.
And there is no extended commercial part on iMX9 (91/93/94/95),
fix it to extended industrial.

Signed-off-by: Ye Li &lt;ye.li@nxp.com&gt;
</content>
</entry>
<entry>
<title>cpu: armv8: Staticize driver ops</title>
<updated>2026-05-18T22:56:07Z</updated>
<author>
<name>Marek Vasut</name>
<email>marek.vasut+renesas@mailbox.org</email>
</author>
<published>2026-05-08T13:50:53Z</published>
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<id>urn:sha1:1f1ec618f2a9129714fdb30d8120d7b3808947a2</id>
<content type='text'>
Set the ops structure as static. The structure is not accessible
from outside of this driver.

Signed-off-by: Marek Vasut &lt;marek.vasut+renesas@mailbox.org&gt;
</content>
</entry>
<entry>
<title>cpu: microblaze: Fix unmet direct dependencies for XILINX_MICROBLAZE0_PVR</title>
<updated>2026-03-27T13:49:32Z</updated>
<author>
<name>Michal Simek</name>
<email>michal.simek@amd.com</email>
</author>
<published>2026-03-17T16:26:22Z</published>
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<id>urn:sha1:fcc50761f3d0518c4d1693f75d2e79ad7b108355</id>
<content type='text'>
As exposed by "make randconfig", CPU_MICROBLAZE uses select to
force-enable XILINX_MICROBLAZE0_PVR, but that symbol depends on
TARGET_MICROBLAZE_GENERIC. The select bypasses this dependency chain,
triggering a Kconfig warning:

  WARNING: unmet direct dependencies detected for XILINX_MICROBLAZE0_PVR
    Depends on [n]: MICROBLAZE [=y] &amp;&amp; TARGET_MICROBLAZE_GENERIC [=n]
    Selected by [y]:
    - CPU_MICROBLAZE [=y] &amp;&amp; CPU [=y] &amp;&amp; MICROBLAZE [=y]

Change XILINX_MICROBLAZE0_PVR from select to depends on, so that the
CPU driver is only available when PVR support has been explicitly
enabled.

Fixes: 816226d27efa ("cpu: add CPU driver for microblaze")
Reported-by: Tom Rini &lt;trini@konsulko.com&gt;
Signed-off-by: Michal Simek &lt;michal.simek@amd.com&gt;
Link: https://lore.kernel.org/r/61ddd555f58ef5169c48b190423640d949e4aad1.1773764781.git.michal.simek@amd.com
</content>
</entry>
<entry>
<title>cpu: imx952: Add i.MX952 support</title>
<updated>2026-03-16T21:44:00Z</updated>
<author>
<name>Alice Guo</name>
<email>alice.guo@nxp.com</email>
</author>
<published>2026-03-02T05:20:09Z</published>
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<id>urn:sha1:62a82fa290748a51b671138cc513004f08cb6130</id>
<content type='text'>
This patch is used to add the imx type string of i.MX952 so that the
i.MX952 CPU info can be printed.

Signed-off-by: Alice Guo &lt;alice.guo@nxp.com&gt;
Reviewed-by: Peng Fan &lt;peng.fan@nxp.com&gt;
</content>
</entry>
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