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<title>u-boot.git/drivers/cpu, branch v2020.01-rc2</title>
<subtitle>Unnamed repository; edit this file 'description' to name the repository.
</subtitle>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/'/>
<entry>
<title>imx8: move i.MX8 cpu desc code to drivers/cpu/imx8_cpu.c</title>
<updated>2019-10-08T14:35:59+00:00</updated>
<author>
<name>Peng Fan</name>
<email>peng.fan@nxp.com</email>
</author>
<published>2019-08-26T08:12:19+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=43c50873854204cc5ca810516e160afb512303be'/>
<id>43c50873854204cc5ca810516e160afb512303be</id>
<content type='text'>
Move cpu desc code to cpu driver directory and name it imx8_cpu.c
No functional change.

Signed-off-by: Peng Fan &lt;peng.fan@nxp.com&gt;
</content>
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<pre>
Move cpu desc code to cpu driver directory and name it imx8_cpu.c
No functional change.

Signed-off-by: Peng Fan &lt;peng.fan@nxp.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>riscv: cpu: Skip unavailable hart in the get_count() op</title>
<updated>2019-09-03T01:29:43+00:00</updated>
<author>
<name>Bin Meng</name>
<email>bmeng.cn@gmail.com</email>
</author>
<published>2019-08-08T07:52:08+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=4dfea4b5cd68b86dd47d1333f1871a402087deaa'/>
<id>4dfea4b5cd68b86dd47d1333f1871a402087deaa</id>
<content type='text'>
We should not count in hart that is marked as not available in the
device tree in riscv_cpu_get_count().

Signed-off-by: Bin Meng &lt;bmeng.cn@gmail.com&gt;
Reviewed-by: Rick Chen &lt;rick@andestech.com&gt;
Reviewed-by: Lukas Auer &lt;lukas.auer@aisec.fraunhofer.de&gt;
</content>
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<pre>
We should not count in hart that is marked as not available in the
device tree in riscv_cpu_get_count().

Signed-off-by: Bin Meng &lt;bmeng.cn@gmail.com&gt;
Reviewed-by: Rick Chen &lt;rick@andestech.com&gt;
Reviewed-by: Lukas Auer &lt;lukas.auer@aisec.fraunhofer.de&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>cpu: Bind timer driver for boot hart</title>
<updated>2019-02-27T01:12:33+00:00</updated>
<author>
<name>Atish Patra</name>
<email>atish.patra@wdc.com</email>
</author>
<published>2019-02-25T08:15:14+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=007056f495c9fc5c544f71762f874a19a9b004a3'/>
<id>007056f495c9fc5c544f71762f874a19a9b004a3</id>
<content type='text'>
Currently, timer driver is bound only for hart0.

There is no mandatory requirement that hart0 should always
come up. In fact, HiFive Unleashed SoC hart0 doesn't boot
in S-mode because it only has M-mode.

The timer driver should be bound for boot hart.

Signed-off-by: Atish Patra &lt;atish.patra@wdc.com&gt;
Signed-off-by: Anup Patel &lt;anup.patel@wdc.com&gt;
Reviewed-by: Alexander Graf &lt;agraf@suse.de&gt;
Reviewed-by: Lukas Auer &lt;lukas.auer@aisec.fraunhofer.de&gt;
Reviewed-by: Bin Meng &lt;bmeng.cn@gmail.com&gt;
</content>
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<pre>
Currently, timer driver is bound only for hart0.

There is no mandatory requirement that hart0 should always
come up. In fact, HiFive Unleashed SoC hart0 doesn't boot
in S-mode because it only has M-mode.

The timer driver should be bound for boot hart.

Signed-off-by: Atish Patra &lt;atish.patra@wdc.com&gt;
Signed-off-by: Anup Patel &lt;anup.patel@wdc.com&gt;
Reviewed-by: Alexander Graf &lt;agraf@suse.de&gt;
Reviewed-by: Lukas Auer &lt;lukas.auer@aisec.fraunhofer.de&gt;
Reviewed-by: Bin Meng &lt;bmeng.cn@gmail.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>cpu: Add a RISC-V CPU driver</title>
<updated>2018-12-18T01:56:26+00:00</updated>
<author>
<name>Bin Meng</name>
<email>bmeng.cn@gmail.com</email>
</author>
<published>2018-12-12T14:12:26+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=833508c05c1309624cd397dbea2714b723d58c35'/>
<id>833508c05c1309624cd397dbea2714b723d58c35</id>
<content type='text'>
This adds a driver for RISC-V CPU. Note the driver will bind
a RISC-V timer driver if "timebase-frequency" property is
present in the device tree.

Signed-off-by: Bin Meng &lt;bmeng.cn@gmail.com&gt;
Reviewed-by: Lukas Auer &lt;lukas.auer@aisec.fraunhofer.de&gt;
Reviewed-by: Anup Patel &lt;anup@brainfault.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
This adds a driver for RISC-V CPU. Note the driver will bind
a RISC-V timer driver if "timebase-frequency" property is
present in the device tree.

Signed-off-by: Bin Meng &lt;bmeng.cn@gmail.com&gt;
Reviewed-by: Lukas Auer &lt;lukas.auer@aisec.fraunhofer.de&gt;
Reviewed-by: Anup Patel &lt;anup@brainfault.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>cpu: mpc83xx: Remove unnecessary characters in the description string</title>
<updated>2018-11-14T17:16:27+00:00</updated>
<author>
<name>Bin Meng</name>
<email>bmeng.cn@gmail.com</email>
</author>
<published>2018-10-11T05:06:56+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=6fe8abcce740a67e81fb6115f54dba380bd2ff4d'/>
<id>6fe8abcce740a67e81fb6115f54dba380bd2ff4d</id>
<content type='text'>
The description string should not contain unnecessary characters,
like the ending '\n' or the leading 'CPU:'.

Signed-off-by: Bin Meng &lt;bmeng.cn@gmail.com&gt;
Reviewed-by: Simon Glass &lt;sjg@chromium.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
The description string should not contain unnecessary characters,
like the ending '\n' or the leading 'CPU:'.

Signed-off-by: Bin Meng &lt;bmeng.cn@gmail.com&gt;
Reviewed-by: Simon Glass &lt;sjg@chromium.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>drivers: cosmetic: Convert SPDX license tags to Linux Kernel style</title>
<updated>2018-10-28T13:26:39+00:00</updated>
<author>
<name>Patrick Delaunay</name>
<email>patrick.delaunay@st.com</email>
</author>
<published>2018-10-26T07:02:52+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=22929e1266e9a61048bfaef381ad4fb2e2fc3ef5'/>
<id>22929e1266e9a61048bfaef381ad4fb2e2fc3ef5</id>
<content type='text'>
Complete in the drivers directory the work started with
commit 83d290c56fab ("SPDX: Convert all of our single
license tags to Linux Kernel style").

Reviewed-by: Simon Glass &lt;sjg@chromium.org&gt;
Signed-off-by: Patrick Delaunay &lt;patrick.delaunay@st.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Complete in the drivers directory the work started with
commit 83d290c56fab ("SPDX: Convert all of our single
license tags to Linux Kernel style").

Reviewed-by: Simon Glass &lt;sjg@chromium.org&gt;
Signed-off-by: Patrick Delaunay &lt;patrick.delaunay@st.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>cpu: Add MPC83xx CPU driver</title>
<updated>2018-09-18T14:12:21+00:00</updated>
<author>
<name>Mario Six</name>
<email>mario.six@gdsys.cc</email>
</author>
<published>2018-08-06T08:23:45+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=19fbdca47b3d847824ada3ab2ed575019c88516e'/>
<id>19fbdca47b3d847824ada3ab2ed575019c88516e</id>
<content type='text'>
Add a CPU driver for the MPC83xx architecture.

Signed-off-by: Mario Six &lt;mario.six@gdsys.cc&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Add a CPU driver for the MPC83xx architecture.

Signed-off-by: Mario Six &lt;mario.six@gdsys.cc&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>test: Add tests for CPU uclass</title>
<updated>2018-09-18T14:12:21+00:00</updated>
<author>
<name>Mario Six</name>
<email>mario.six@gdsys.cc</email>
</author>
<published>2018-08-06T08:23:44+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=fa44b53398d3a7f5ed28cb83493a70cde11f8188'/>
<id>fa44b53398d3a7f5ed28cb83493a70cde11f8188</id>
<content type='text'>
Add a sandbox CPU driver, and some tests for the CPU uclass.

Signed-off-by: Mario Six &lt;mario.six@gdsys.cc&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Add a sandbox CPU driver, and some tests for the CPU uclass.

Signed-off-by: Mario Six &lt;mario.six@gdsys.cc&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>cpu: Add cpu_probe_all method</title>
<updated>2018-09-18T14:12:21+00:00</updated>
<author>
<name>Mario Six</name>
<email>mario.six@gdsys.cc</email>
</author>
<published>2018-08-06T08:23:43+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=57370de377340b0fcb81d90a187aa8b8f3494447'/>
<id>57370de377340b0fcb81d90a187aa8b8f3494447</id>
<content type='text'>
Add a method to probe all CPUs of the board.

Signed-off-by: Mario Six &lt;mario.six@gdsys.cc&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Add a method to probe all CPUs of the board.

Signed-off-by: Mario Six &lt;mario.six@gdsys.cc&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>bcm6838: add initial support</title>
<updated>2018-08-08T11:38:17+00:00</updated>
<author>
<name>Philippe Reynes</name>
<email>philippe.reynes@softathome.com</email>
</author>
<published>2018-07-16T17:06:14+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=341032d3f156858124de5abec6ec174a2cce1bf3'/>
<id>341032d3f156858124de5abec6ec174a2cce1bf3</id>
<content type='text'>
This adds the initial support of the Broadcom BCM6838 SoC familly,
only cpu, dram, uart and leds are supported.

Signed-off-by: Philippe Reynes &lt;philippe.reynes@softathome.com&gt;
Reviewed-by: Daniel Schwierzeck &lt;daniel.schwierzeck@gmail.com&gt;
</content>
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<pre>
This adds the initial support of the Broadcom BCM6838 SoC familly,
only cpu, dram, uart and leds are supported.

Signed-off-by: Philippe Reynes &lt;philippe.reynes@softathome.com&gt;
Reviewed-by: Daniel Schwierzeck &lt;daniel.schwierzeck@gmail.com&gt;
</pre>
</div>
</content>
</entry>
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