<feed xmlns='http://www.w3.org/2005/Atom'>
<title>u-boot.git/drivers/cpu, branch v2024.07-rc2</title>
<subtitle>Unnamed repository; edit this file 'description' to name the repository.
</subtitle>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/'/>
<entry>
<title>cpu: drop imx9_cpu</title>
<updated>2024-04-15T11:09:36+00:00</updated>
<author>
<name>Peng Fan</name>
<email>peng.fan@nxp.com</email>
</author>
<published>2024-04-12T14:24:53+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=9422e1c44167e46bdf017736c96ef33ec28c9500'/>
<id>9422e1c44167e46bdf017736c96ef33ec28c9500</id>
<content type='text'>
This was wrongly committed, no user, remove it.

Signed-off-by: Peng Fan &lt;peng.fan@nxp.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
This was wrongly committed, no user, remove it.

Signed-off-by: Peng Fan &lt;peng.fan@nxp.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>riscv: don't read riscv, isa in the riscv cpu's get_desc()</title>
<updated>2024-04-09T03:30:17+00:00</updated>
<author>
<name>Conor Dooley</name>
<email>conor.dooley@microchip.com</email>
</author>
<published>2024-03-18T15:16:02+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=b90edde70127a824d7aa257c6a633c1a030bfb79'/>
<id>b90edde70127a824d7aa257c6a633c1a030bfb79</id>
<content type='text'>
cpu_get_desc() for the RISC-V CPU currently reads "riscv,isa" to get
the description, but it is no longer a required property and cannot be
assummed to always be present, as the new "riscv,isa-extensions" and
"riscv,isa-base" properties may be present instead.

On RISC-V, cpu_get_desc() has two main uses - firstly providing an
informational name for the CPU for smbios or at boot with
DISPLAY_CPUINFO etc and secondly it forms the basis of ISA extension
detection in supports_extension() as it returns (a portion of) an ISA
string.

cpu_get_desc() returns a string, which aligned with "riscv,isa" but
the new property is a list of strings. Rather than add support for
the list of strings property, which would require creating an isa
string from "riscv,isa-extensions", modify the RISC-V CPU's
implementaion of cpu_get_desc() return the first compatible as the
cpu description instead. This may be fine for the informational cases,
but it would break extension dtection, given supports_extension()
expects cpu_get_desc() to return an ISA string.

Call dev_read_string() directly in supports_extension() to get the
contents of "riscv,isa" so that extension detection remains functional.
As a knock-on affect of this change, extension detection is no longer
broken for long ISA strings. Previously if the ISA string exceeded the
32 element array that supports_extension() passed to cpu_get_desc(),
it would return ENOSPC and no extensions would be detected.
This bug probably had no impact as U-Boot does not currently do anything
meaningful with the results of supports_extension() and most SoCs
supported by U-Boot don't have anywhere near that complex of an ISA
string. The QEMU virt machine's CPUs do however, so extension detection
doesn't work there.

Signed-off-by: Conor Dooley &lt;conor.dooley@microchip.com&gt;
reviewed-by: Leo Yu-Chi Liang &lt;ycliang@andestech.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
cpu_get_desc() for the RISC-V CPU currently reads "riscv,isa" to get
the description, but it is no longer a required property and cannot be
assummed to always be present, as the new "riscv,isa-extensions" and
"riscv,isa-base" properties may be present instead.

On RISC-V, cpu_get_desc() has two main uses - firstly providing an
informational name for the CPU for smbios or at boot with
DISPLAY_CPUINFO etc and secondly it forms the basis of ISA extension
detection in supports_extension() as it returns (a portion of) an ISA
string.

cpu_get_desc() returns a string, which aligned with "riscv,isa" but
the new property is a list of strings. Rather than add support for
the list of strings property, which would require creating an isa
string from "riscv,isa-extensions", modify the RISC-V CPU's
implementaion of cpu_get_desc() return the first compatible as the
cpu description instead. This may be fine for the informational cases,
but it would break extension dtection, given supports_extension()
expects cpu_get_desc() to return an ISA string.

Call dev_read_string() directly in supports_extension() to get the
contents of "riscv,isa" so that extension detection remains functional.
As a knock-on affect of this change, extension detection is no longer
broken for long ISA strings. Previously if the ISA string exceeded the
32 element array that supports_extension() passed to cpu_get_desc(),
it would return ENOSPC and no extensions would be detected.
This bug probably had no impact as U-Boot does not currently do anything
meaningful with the results of supports_extension() and most SoCs
supported by U-Boot don't have anywhere near that complex of an ISA
string. The QEMU virt machine's CPUs do however, so extension detection
doesn't work there.

Signed-off-by: Conor Dooley &lt;conor.dooley@microchip.com&gt;
reviewed-by: Leo Yu-Chi Liang &lt;ycliang@andestech.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>smbios: provide type 4 RISC-V SMBIOS Processor ID</title>
<updated>2024-02-02T18:57:16+00:00</updated>
<author>
<name>Heinrich Schuchardt</name>
<email>heinrich.schuchardt@canonical.com</email>
</author>
<published>2024-01-29T11:46:05+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=545e0e42b966751da48117820891356ccf47baf1'/>
<id>545e0e42b966751da48117820891356ccf47baf1</id>
<content type='text'>
For RISC-V CPUs the SMBIOS Processor ID field contains
the Machine Vendor ID from CSR mvendorid.

Signed-off-by: Heinrich Schuchardt &lt;heinrich.schuchardt@canonical.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
For RISC-V CPUs the SMBIOS Processor ID field contains
the Machine Vendor ID from CSR mvendorid.

Signed-off-by: Heinrich Schuchardt &lt;heinrich.schuchardt@canonical.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>treewide: Remove clk_free</title>
<updated>2024-01-30T03:35:02+00:00</updated>
<author>
<name>Sean Anderson</name>
<email>seanga2@gmail.com</email>
</author>
<published>2023-12-16T19:38:42+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=c9309f40a6831b1ac5cd0a7227b5c3717d34c812'/>
<id>c9309f40a6831b1ac5cd0a7227b5c3717d34c812</id>
<content type='text'>
This function is a no-op. Remove it.

Signed-off-by: Sean Anderson &lt;seanga2@gmail.com&gt;
Link: https://lore.kernel.org/r/20231216193843.2463779-3-seanga2@gmail.com
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
This function is a no-op. Remove it.

Signed-off-by: Sean Anderson &lt;seanga2@gmail.com&gt;
Link: https://lore.kernel.org/r/20231216193843.2463779-3-seanga2@gmail.com
</pre>
</div>
</content>
</entry>
<entry>
<title>cpu: riscv: set correct SMBIOS processor family value</title>
<updated>2024-01-09T09:09:15+00:00</updated>
<author>
<name>Heinrich Schuchardt</name>
<email>heinrich.schuchardt@canonical.com</email>
</author>
<published>2023-12-28T07:30:24+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=1b6228f28d9336620fb508ed198ad8be1eb7aa9c'/>
<id>1b6228f28d9336620fb508ed198ad8be1eb7aa9c</id>
<content type='text'>
The SMBIOS specification requires to set the processor family in the type 4
(Processor Information) table to specific values depending only on the
bitness of the system (0x200 for RV32 and 0x201 for RV64).

With this patch dmidecode shows

    Handle 0x0004, DMI type 4, 48 bytes
    Processor Information
	Socket Designation: Not Specified
	Type: Central Processor
	Family: RV64

for qemu-riscv64_smode_defconfig.

Signed-off-by: Heinrich Schuchardt &lt;heinrich.schuchardt@canonical.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
The SMBIOS specification requires to set the processor family in the type 4
(Processor Information) table to specific values depending only on the
bitness of the system (0x200 for RV32 and 0x201 for RV64).

With this patch dmidecode shows

    Handle 0x0004, DMI type 4, 48 bytes
    Processor Information
	Socket Designation: Not Specified
	Type: Central Processor
	Family: RV64

for qemu-riscv64_smode_defconfig.

Signed-off-by: Heinrich Schuchardt &lt;heinrich.schuchardt@canonical.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>cpu: Remove unused NEEDS_MANUAL_RELOC code bits</title>
<updated>2023-09-14T14:42:24+00:00</updated>
<author>
<name>Marek Vasut</name>
<email>marek.vasut+renesas@mailbox.org</email>
</author>
<published>2023-09-06T21:30:01+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=568e6ae97d030a6e98b4a0325fb4848c6ddbfaa7'/>
<id>568e6ae97d030a6e98b4a0325fb4848c6ddbfaa7</id>
<content type='text'>
The last user of the NEEDS_MANUAL_RELOC has been removed in commit
26af162ac8f8 ("arch: m68k: Implement relocation")
Remove now unused NEEDS_MANUAL_RELOC code.

Signed-off-by: Marek Vasut &lt;marek.vasut+renesas@mailbox.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
The last user of the NEEDS_MANUAL_RELOC has been removed in commit
26af162ac8f8 ("arch: m68k: Implement relocation")
Remove now unused NEEDS_MANUAL_RELOC code.

Signed-off-by: Marek Vasut &lt;marek.vasut+renesas@mailbox.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>event: Convert existing spy records to simple</title>
<updated>2023-08-31T17:16:54+00:00</updated>
<author>
<name>Simon Glass</name>
<email>sjg@chromium.org</email>
</author>
<published>2023-08-22T03:16:56+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=f72d0d4a2f9a2d05ebeefb583992cc620f7c4c2d'/>
<id>f72d0d4a2f9a2d05ebeefb583992cc620f7c4c2d</id>
<content type='text'>
Very few of the existing event-spy records use the arguments they are
passed. Update them to use a simple spy instead, to simplify the code.

Where an adaptor function is currently used, remove it where possible.

Signed-off-by: Simon Glass &lt;sjg@chromium.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Very few of the existing event-spy records use the arguments they are
passed. Update them to use a simple spy instead, to simplify the code.

Where an adaptor function is currently used, remove it where possible.

Signed-off-by: Simon Glass &lt;sjg@chromium.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>imx9: add i.MX93 variants support</title>
<updated>2023-05-21T14:54:41+00:00</updated>
<author>
<name>Peng Fan</name>
<email>peng.fan@nxp.com</email>
</author>
<published>2023-04-28T04:08:32+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=58da865e27f4a50d95b962bb6b299c18bcf8a5d3'/>
<id>58da865e27f4a50d95b962bb6b299c18bcf8a5d3</id>
<content type='text'>
According to datasheet, iMX93 has fused parts with CORE1 or NPU or
both disabled. So update code to support it, the kernel device tree
runtime update will be added in future patches.

Signed-off-by: Peng Fan &lt;peng.fan@nxp.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
According to datasheet, iMX93 has fused parts with CORE1 or NPU or
both disabled. So update code to support it, the kernel device tree
runtime update will be added in future patches.

Signed-off-by: Peng Fan &lt;peng.fan@nxp.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>imx: imx8_cpu: print cpu grade temperature</title>
<updated>2023-05-21T14:54:40+00:00</updated>
<author>
<name>Peng Fan</name>
<email>peng.fan@nxp.com</email>
</author>
<published>2023-04-28T04:08:14+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=f3a07717b721edfb5a183f8e3403f70a3727fca5'/>
<id>f3a07717b721edfb5a183f8e3403f70a3727fca5</id>
<content type='text'>
Support print out cpu grade temperature

Signed-off-by: Peng Fan &lt;peng.fan@nxp.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Support print out cpu grade temperature

Signed-off-by: Peng Fan &lt;peng.fan@nxp.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>imx: imx8_cpu: support get temperature for i.MX9</title>
<updated>2023-05-21T14:54:40+00:00</updated>
<author>
<name>Peng Fan</name>
<email>peng.fan@nxp.com</email>
</author>
<published>2023-04-28T04:08:13+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=7c5256e89f9e65b15af8821585a11f13e5cc4348'/>
<id>7c5256e89f9e65b15af8821585a11f13e5cc4348</id>
<content type='text'>
Use CONFIG_DM_THERMAL to make the temperature function could be reused
by i.MX8 and i.MX9

Signed-off-by: Peng Fan &lt;peng.fan@nxp.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Use CONFIG_DM_THERMAL to make the temperature function could be reused
by i.MX8 and i.MX9

Signed-off-by: Peng Fan &lt;peng.fan@nxp.com&gt;
</pre>
</div>
</content>
</entry>
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