<feed xmlns='http://www.w3.org/2005/Atom'>
<title>u-boot.git/drivers/cpu, branch v2025.04</title>
<subtitle>Unnamed repository; edit this file 'description' to name the repository.
</subtitle>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/'/>
<entry>
<title>imx: Add iMX91 support</title>
<updated>2024-12-07T12:07:04+00:00</updated>
<author>
<name>Peng Fan</name>
<email>peng.fan@nxp.com</email>
</author>
<published>2024-12-03T15:42:48+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=a9d562daa3c35ee992f3f394581e80e145da4933'/>
<id>a9d562daa3c35ee992f3f394581e80e145da4933</id>
<content type='text'>
iMX91 is reduced part from iMX93 with part number: i.MX9131/11/01
It removed A55_1, M33, MIPI DSI, LVDS, etc.

i.MX9131:
  - Support 2.4GT/s DDR and HWFFC at 1.2GT/s
i.MX9121:
  - A55 at 800Mhz and DDR at 1600MTS, with low drive mode.
i.MX9111:
  - Support 1.6GT/s DDR and HWFFC at 800MT/s
i.MX9101:
  - Support 800Mhz ARM clock
  - Support 1.6GT/s DDR and HWFFC at 800MT/s
  - No parallel display, eQOS, flexcan

Updated Clock/Container/CPU and etc for i.MX91

Signed-off-by: Ye Li &lt;ye.li@nxp.com&gt;
Signed-off-by: Peng Fan &lt;peng.fan@nxp.com&gt;
</content>
<content type='xhtml'>
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<pre>
iMX91 is reduced part from iMX93 with part number: i.MX9131/11/01
It removed A55_1, M33, MIPI DSI, LVDS, etc.

i.MX9131:
  - Support 2.4GT/s DDR and HWFFC at 1.2GT/s
i.MX9121:
  - A55 at 800Mhz and DDR at 1600MTS, with low drive mode.
i.MX9111:
  - Support 1.6GT/s DDR and HWFFC at 800MT/s
i.MX9101:
  - Support 800Mhz ARM clock
  - Support 1.6GT/s DDR and HWFFC at 800MT/s
  - No parallel display, eQOS, flexcan

Updated Clock/Container/CPU and etc for i.MX91

Signed-off-by: Ye Li &lt;ye.li@nxp.com&gt;
Signed-off-by: Peng Fan &lt;peng.fan@nxp.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>Merge patch series "Implement ACPI on aarch64"</title>
<updated>2024-10-28T00:44:13+00:00</updated>
<author>
<name>Tom Rini</name>
<email>trini@konsulko.com</email>
</author>
<published>2024-10-27T23:14:22+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=2800aecce08b47b169d8e9824dd23b1297b2cedc'/>
<id>2800aecce08b47b169d8e9824dd23b1297b2cedc</id>
<content type='text'>
Patrick Rudolph &lt;patrick.rudolph@9elements.com&gt; says:

Based on the existing work done by Simon Glass this series adds
support for booting aarch64 devices using ACPI only.
As first target QEMU SBSA support is added, which relies on ACPI
only to boot an OS. As secondary target the Raspberry Pi4 was used,
which is broadly available and allows easy testing of the proposed
solution.

The series is split into ACPI cleanups and code movements, adding
Arm specific ACPI tables and finally SoC and mainboard related
changes to boot a Linux on the QEMU SBSA and RPi4. Currently only the
mandatory ACPI tables are supported, allowing to boot into Linux
without errors.

The QEMU SBSA support is feature complete and provides the same
functionality as the EDK2 implementation.

The changes were tested on real hardware as well on QEMU v9.0:

qemu-system-aarch64 -machine sbsa-ref -nographic -cpu cortex-a57 \
                    -pflash secure-world.rom \
                    -pflash unsecure-world.rom

qemu-system-aarch64 -machine raspi4b -kernel u-boot.bin -cpu cortex-a72 \
-smp 4 -m 2G -drive file=raspbian.img,format=raw,index=0 \
-dtb bcm2711-rpi-4-b.dtb -nographic

Tested against FWTS V24.03.00.

Known issues:
- The QEMU rpi4 support is currently limited as it doesn't emulate PCI,
  USB or ethernet devices!
- The SMP bringup doesn't work on RPi4, but works in QEMU (Possibly
  cache related).
- PCI on RPI4 isn't working on real hardware since the pcie_brcmstb
  Linux kernel module doesn't support ACPI yet.

Link: https://lore.kernel.org/r/20241023132116.970117-1-patrick.rudolph@9elements.com
</content>
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<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Patrick Rudolph &lt;patrick.rudolph@9elements.com&gt; says:

Based on the existing work done by Simon Glass this series adds
support for booting aarch64 devices using ACPI only.
As first target QEMU SBSA support is added, which relies on ACPI
only to boot an OS. As secondary target the Raspberry Pi4 was used,
which is broadly available and allows easy testing of the proposed
solution.

The series is split into ACPI cleanups and code movements, adding
Arm specific ACPI tables and finally SoC and mainboard related
changes to boot a Linux on the QEMU SBSA and RPi4. Currently only the
mandatory ACPI tables are supported, allowing to boot into Linux
without errors.

The QEMU SBSA support is feature complete and provides the same
functionality as the EDK2 implementation.

The changes were tested on real hardware as well on QEMU v9.0:

qemu-system-aarch64 -machine sbsa-ref -nographic -cpu cortex-a57 \
                    -pflash secure-world.rom \
                    -pflash unsecure-world.rom

qemu-system-aarch64 -machine raspi4b -kernel u-boot.bin -cpu cortex-a72 \
-smp 4 -m 2G -drive file=raspbian.img,format=raw,index=0 \
-dtb bcm2711-rpi-4-b.dtb -nographic

Tested against FWTS V24.03.00.

Known issues:
- The QEMU rpi4 support is currently limited as it doesn't emulate PCI,
  USB or ethernet devices!
- The SMP bringup doesn't work on RPi4, but works in QEMU (Possibly
  cache related).
- PCI on RPI4 isn't working on real hardware since the pcie_brcmstb
  Linux kernel module doesn't support ACPI yet.

Link: https://lore.kernel.org/r/20241023132116.970117-1-patrick.rudolph@9elements.com
</pre>
</div>
</content>
</entry>
<entry>
<title>arm: mach-bcm283x: Add ARMV8_MULTIENTRY support</title>
<updated>2024-10-27T23:24:13+00:00</updated>
<author>
<name>Patrick Rudolph</name>
<email>patrick.rudolph@9elements.com</email>
</author>
<published>2024-10-23T13:20:16+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=ceff6f478f4d1db7339e174b7e52a4bd3af27967'/>
<id>ceff6f478f4d1db7339e174b7e52a4bd3af27967</id>
<content type='text'>
When ACPI is enabled over FDT the APs cannot be brought out of reset
by the OS using the "FDT spin-table" mechanism, as no FDT is provided
to the OS. The APs must be released out of reset in u-boot and then
brought up in an ACPI compliant fashion.

When ARMV8_MULTIENTRY is specified, the APs are released from reset
and will enter U-Boot after it has been relocated as well.

By default ARMV8_MULTIENTRY is not selected, keeping existing behaviour.

TEST: All APs enter U-Boot when run on qemu-system-aarch64 and on
      real hardware.

Signed-off-by: Patrick Rudolph &lt;patrick.rudolph@9elements.com&gt;
Reviewed-by: Simon Glass &lt;sjg@chromium.org&gt;
Cc: Matthias Brugger &lt;mbrugger@suse.com&gt;
Cc: Peter Robinson &lt;pbrobinson@gmail.com&gt;
Cc: Tom Rini &lt;trini@konsulko.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
When ACPI is enabled over FDT the APs cannot be brought out of reset
by the OS using the "FDT spin-table" mechanism, as no FDT is provided
to the OS. The APs must be released out of reset in u-boot and then
brought up in an ACPI compliant fashion.

When ARMV8_MULTIENTRY is specified, the APs are released from reset
and will enter U-Boot after it has been relocated as well.

By default ARMV8_MULTIENTRY is not selected, keeping existing behaviour.

TEST: All APs enter U-Boot when run on qemu-system-aarch64 and on
      real hardware.

Signed-off-by: Patrick Rudolph &lt;patrick.rudolph@9elements.com&gt;
Reviewed-by: Simon Glass &lt;sjg@chromium.org&gt;
Cc: Matthias Brugger &lt;mbrugger@suse.com&gt;
Cc: Peter Robinson &lt;pbrobinson@gmail.com&gt;
Cc: Tom Rini &lt;trini@konsulko.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>drivers/arm: Implement acpi_fill_madt</title>
<updated>2024-10-27T23:24:13+00:00</updated>
<author>
<name>Patrick Rudolph</name>
<email>patrick.rudolph@9elements.com</email>
</author>
<published>2024-10-23T13:20:06+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=142f92bf0465b0fc9fb59a055c1f25f18d3acaf3'/>
<id>142f92bf0465b0fc9fb59a055c1f25f18d3acaf3</id>
<content type='text'>
Fill the MADT table in the GIC driver and armv8 CPU driver to
drop SoC specific code. While the GIC only needs devicetree
data, the CPU driver needs additional information stored in
the cpu_plat struct.

While on it update the only board making use of the existing
drivers and writing ACPI MADT in mainboard code.

TEST: Booted on QEMU sbsa-ref using GICV3 driver model generated MADT.
      Booted on QEMU raspb4 using GICV2 driver model generated MADT.

Signed-off-by: Patrick Rudolph &lt;patrick.rudolph@9elements.com&gt;
Reviewed-by: Simon Glass &lt;sjg@chromium.org&gt;
Cc: Simon Glass &lt;sjg@chromium.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Fill the MADT table in the GIC driver and armv8 CPU driver to
drop SoC specific code. While the GIC only needs devicetree
data, the CPU driver needs additional information stored in
the cpu_plat struct.

While on it update the only board making use of the existing
drivers and writing ACPI MADT in mainboard code.

TEST: Booted on QEMU sbsa-ref using GICV3 driver model generated MADT.
      Booted on QEMU raspb4 using GICV2 driver model generated MADT.

Signed-off-by: Patrick Rudolph &lt;patrick.rudolph@9elements.com&gt;
Reviewed-by: Simon Glass &lt;sjg@chromium.org&gt;
Cc: Simon Glass &lt;sjg@chromium.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>drivers/cpu: Add generic armv8 cpu driver</title>
<updated>2024-10-27T23:24:13+00:00</updated>
<author>
<name>Patrick Rudolph</name>
<email>patrick.rudolph@9elements.com</email>
</author>
<published>2024-10-23T13:20:01+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=83a2f4a8d2999cbf873a98b47d75436172946a15'/>
<id>83a2f4a8d2999cbf873a98b47d75436172946a15</id>
<content type='text'>
Add a generic driver that binds to armv8 CPU nodes. The generic driver allows
- to enumerate CPUs present in a system, even when no other driver binds it
- generates ACPI SSDT code for each CPU
- Fill the ACPI MADT table (implemented in a follow up patch)

The newly introduced code could also be reused on other CPU drivers that are
compatible with armv8.

TEST: Booted on QEMU sbsa and verify the driver binds to CPU nodes.
      Confirmed with FWTS that all ACPI processor devices are present.

Signed-off-by: Patrick Rudolph &lt;patrick.rudolph@9elements.com&gt;
Reviewed-by: Simon Glass &lt;sjg@chromium.org&gt;
Cc: Tom Rini &lt;trini@konsulko.com&gt;
Cc: Simon Glass &lt;sjg@chromium.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Add a generic driver that binds to armv8 CPU nodes. The generic driver allows
- to enumerate CPUs present in a system, even when no other driver binds it
- generates ACPI SSDT code for each CPU
- Fill the ACPI MADT table (implemented in a follow up patch)

The newly introduced code could also be reused on other CPU drivers that are
compatible with armv8.

TEST: Booted on QEMU sbsa and verify the driver binds to CPU nodes.
      Confirmed with FWTS that all ACPI processor devices are present.

Signed-off-by: Patrick Rudolph &lt;patrick.rudolph@9elements.com&gt;
Reviewed-by: Simon Glass &lt;sjg@chromium.org&gt;
Cc: Tom Rini &lt;trini@konsulko.com&gt;
Cc: Simon Glass &lt;sjg@chromium.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>cpu: imx8_cpu: Avoid revision to corrupt device tree</title>
<updated>2024-10-18T12:41:09+00:00</updated>
<author>
<name>Peng Fan</name>
<email>peng.fan@nxp.com</email>
</author>
<published>2024-10-18T07:34:32+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=9b1cecdd9b6eaf22c4fa268430669ceff0c48786'/>
<id>9b1cecdd9b6eaf22c4fa268430669ceff0c48786</id>
<content type='text'>
U-Boot device tree is padded just after U-Boot proper.
After the whole stuff loaded to DRAM space, the device tree
area is conflict with BSS region before U-Boot relocation.

So any write to BSS area before reloc_fdt will corrupt the
device tree. Without the fix, there is issue that “binman_init
failed:-2” on i.MX8MP-EVK board.

Drop 'revision' and use malloc area in cpu_imx_plat-&gt;rev.

Signed-off-by: Peng Fan &lt;peng.fan@nxp.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
U-Boot device tree is padded just after U-Boot proper.
After the whole stuff loaded to DRAM space, the device tree
area is conflict with BSS region before U-Boot relocation.

So any write to BSS area before reloc_fdt will corrupt the
device tree. Without the fix, there is issue that “binman_init
failed:-2” on i.MX8MP-EVK board.

Drop 'revision' and use malloc area in cpu_imx_plat-&gt;rev.

Signed-off-by: Peng Fan &lt;peng.fan@nxp.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>imx93: Add Low performance parts 9302/9301 support</title>
<updated>2024-09-19T03:12:41+00:00</updated>
<author>
<name>Ye Li</name>
<email>ye.li@nxp.com</email>
</author>
<published>2024-09-19T04:01:33+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=5ee773e60b3f5e024d1177d4be52c07d741c228d'/>
<id>5ee773e60b3f5e024d1177d4be52c07d741c228d</id>
<content type='text'>
Add support for iMX93 low performance parts 9302 and 9301 which
restrict to low drive voltage only.
The parts run A55 max speed at 900Mhz and M33 at 133Mhz, have NPU
and A55 core1 (9301) disabled.

Reviewed-by: Peng Fan &lt;peng.fan@nxp.com&gt;
Signed-off-by: Ye Li &lt;ye.li@nxp.com&gt;
Signed-off-by: Peng Fan &lt;peng.fan@nxp.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Add support for iMX93 low performance parts 9302 and 9301 which
restrict to low drive voltage only.
The parts run A55 max speed at 900Mhz and M33 at 133Mhz, have NPU
and A55 core1 (9301) disabled.

Reviewed-by: Peng Fan &lt;peng.fan@nxp.com&gt;
Signed-off-by: Ye Li &lt;ye.li@nxp.com&gt;
Signed-off-by: Peng Fan &lt;peng.fan@nxp.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>cpu: imx: implement release_core callback</title>
<updated>2024-08-02T18:16:51+00:00</updated>
<author>
<name>Hou Zhiqiang</name>
<email>Zhiqiang.Hou@nxp.com</email>
</author>
<published>2024-08-01T03:59:54+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=8a73b5b680a849193287decf0ca3470fbd764e42'/>
<id>8a73b5b680a849193287decf0ca3470fbd764e42</id>
<content type='text'>
Release the secondary cores through the PSCI request.

Signed-off-by: Hou Zhiqiang &lt;Zhiqiang.Hou@nxp.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Release the secondary cores through the PSCI request.

Signed-off-by: Hou Zhiqiang &lt;Zhiqiang.Hou@nxp.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>cpu: imx: Add i.MX 8M series SoCs</title>
<updated>2024-08-02T18:16:51+00:00</updated>
<author>
<name>Hou Zhiqiang</name>
<email>Zhiqiang.Hou@nxp.com</email>
</author>
<published>2024-08-01T03:59:53+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=01d94d006a2a9f02e76fb1660a6e8f64731bfe03'/>
<id>01d94d006a2a9f02e76fb1660a6e8f64731bfe03</id>
<content type='text'>
Add i.MX 8M Mini, Nano and Plus SoCs support.

Signed-off-by: Hou Zhiqiang &lt;Zhiqiang.Hou@nxp.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Add i.MX 8M Mini, Nano and Plus SoCs support.

Signed-off-by: Hou Zhiqiang &lt;Zhiqiang.Hou@nxp.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>cpu: imx: removed the tail '\n' of the CPU description</title>
<updated>2024-08-02T18:16:51+00:00</updated>
<author>
<name>Hou Zhiqiang</name>
<email>Zhiqiang.Hou@nxp.com</email>
</author>
<published>2024-08-01T03:59:52+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=b7ed7418edb5378fb42a0e3744197b3d6a0383c8'/>
<id>b7ed7418edb5378fb42a0e3744197b3d6a0383c8</id>
<content type='text'>
Return CPU description string without newline character in the end.

Signed-off-by: Hou Zhiqiang &lt;Zhiqiang.Hou@nxp.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Return CPU description string without newline character in the end.

Signed-off-by: Hou Zhiqiang &lt;Zhiqiang.Hou@nxp.com&gt;
</pre>
</div>
</content>
</entry>
</feed>
