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<title>u-boot.git/drivers/crypto/fsl, branch v2015.04-rc2</title>
<subtitle>Unnamed repository; edit this file 'description' to name the repository.</subtitle>
<id>http://cgit.235523.xyz/u-boot.git/atom/drivers/crypto/fsl?h=v2015.04-rc2</id>
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<updated>2015-01-30T00:09:58Z</updated>
<entry>
<title>DM: crypto/fsl - Add Freescale rsa DM driver</title>
<updated>2015-01-30T00:09:58Z</updated>
<author>
<name>Ruchika Gupta</name>
<email>ruchika.gupta@freescale.com</email>
</author>
<published>2015-01-23T10:31:55Z</published>
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<id>urn:sha1:34276478f7b7a0fea9c76e365a477962910ef770</id>
<content type='text'>
Driver added for RSA Modular Exponentiation using Freescale Hardware
Accelerator CAAM. The driver uses UCLASS_MOD_EXP

Signed-off-by: Ruchika Gupta &lt;ruchika.gupta@freescale.com&gt;
CC: Simon Glass &lt;sjg@chromium.org&gt;
Acked-by: Simon Glass &lt;sjg@chromium.org&gt;
</content>
</entry>
<entry>
<title>crypto/fsl: Add fixup for crypto node</title>
<updated>2015-01-24T04:29:14Z</updated>
<author>
<name>Ruchika Gupta</name>
<email>ruchika.gupta@freescale.com</email>
</author>
<published>2014-12-15T06:00:36Z</published>
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<id>urn:sha1:0181937fa371aa482d99f17ab2bc219bfcbb21b2</id>
<content type='text'>
Era property is added in the crypto node in device tree.
Move the code to do so from arch/powerpc/mpc8xxx/fdt.c to
drivers/sec/sec.c so that it can be used across arm and
powerpc platforms having crypto node.

Signed-off-by: Ruchika Gupta &lt;ruchika.gupta@freescale.com&gt;
[York Sun: Fix commit message indentation]
Reviewed-by: York Sun &lt;yorksun@freescale.com&gt;
</content>
</entry>
<entry>
<title>crypto/fsl: Fix RNG instantiation failure.</title>
<updated>2014-12-15T17:16:26Z</updated>
<author>
<name>gaurav rana</name>
<email>gaurav.rana@freescale.com</email>
</author>
<published>2014-12-04T07:30:41Z</published>
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<id>urn:sha1:851c9dbad200538bdd181c7d7db98300911fc100</id>
<content type='text'>
Corrected the order of arguments in memset in run_descriptor
function. Wrong order of argumnets led to improper initialization
of members of struct type result. This resulted in RNG instantiation
error.

Signed-off-by: Gaurav Rana &lt;gaurav.rana@freescale.com&gt;
Reviewed-by: York Sun &lt;yorksun@freescale.com&gt;
</content>
</entry>
<entry>
<title>crypto/fsl: Add command for encapsulating/decapsulating blobs</title>
<updated>2014-10-16T21:20:40Z</updated>
<author>
<name>Ruchika Gupta</name>
<email>ruchika.gupta@freescale.com</email>
</author>
<published>2014-10-07T10:16:20Z</published>
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<id>urn:sha1:c5de15cbc8a8c87ae9f104e958ee6a374a145724</id>
<content type='text'>
Freescale's SEC block has built-in Blob Protocol which provides
a method for protecting user-defined data across system power
cycles. SEC block protects data in a data structure called a Blob,
which provides both confidentiality and integrity protection.

Encapsulating data as a blob
Each time that the Blob Protocol is used to protect data, a
different randomly generated key is used to encrypt the data.
This random key is itself encrypted using a key which is derived
from SoC's non volatile secret key and a 16 bit Key identifier.
The resulting encrypted key along with encrypted data is called a blob.
The non volatile secure key is available for use only during secure boot.

During decapsulation, the reverse process is performed to get back
the original data.

Commands added
--------------
    blob enc - encapsulating data as a cryptgraphic blob
    blob dec - decapsulating cryptgraphic blob to get the data

Commands Syntax
---------------
	blob enc src dst len km

	Encapsulate and create blob of data $len bytes long
	at address $src and store the result at address $dst.
	$km is the 16 byte key modifier is also required for
	generation/use as key for cryptographic operation. Key
	modifier should be 16 byte long.

	blob dec src dst len km

	Decapsulate the  blob of data at address $src and
	store result of $len byte at addr $dst.
	$km is the 16 byte key modifier is also required for
	generation/use as key for cryptographic operation. Key
	modifier should be 16 byte long.

Signed-off-by: Ruchika Gupta &lt;ruchika.gupta@freescale.com&gt;
Reviewed-by: York Sun &lt;yorksun@freescale.com&gt;
</content>
</entry>
<entry>
<title>fsl_sec: Add hardware accelerated SHA256 and SHA1</title>
<updated>2014-10-16T21:17:07Z</updated>
<author>
<name>Ruchika Gupta</name>
<email>ruchika.gupta@freescale.com</email>
</author>
<published>2014-10-15T06:05:30Z</published>
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<id>urn:sha1:b9eebfade974c86c8ddef64793649374c9876242</id>
<content type='text'>
SHA-256 and SHA-1 accelerated using SEC hardware in Freescale SoC's
The driver for SEC (CAAM) IP is based on linux drivers/crypto/caam.
The platforms needto add the MACRO CONFIG_FSL_CAAM inorder to
enable initialization of this hardware IP.

Signed-off-by: Ruchika Gupta &lt;ruchika.gupta@freescale.com&gt;
Reviewed-by: York Sun &lt;yorksun@freescale.com&gt;
</content>
</entry>
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