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<title>u-boot.git/drivers/crypto/fsl, branch v2023.01</title>
<subtitle>Unnamed repository; edit this file 'description' to name the repository.</subtitle>
<id>http://cgit.235523.xyz/u-boot.git/atom/drivers/crypto/fsl?h=v2023.01</id>
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<updated>2022-11-10T15:08:55Z</updated>
<entry>
<title>global: Migrate CONFIG_SYS_FSL* symbols to the CFG_SYS namespace</title>
<updated>2022-11-10T15:08:55Z</updated>
<author>
<name>Tom Rini</name>
<email>trini@konsulko.com</email>
</author>
<published>2022-10-29T00:27:13Z</published>
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<id>urn:sha1:6cc04547cb3bbd3a3d78947f200acbae19e3c67f</id>
<content type='text'>
Migrate all of COFIG_SYS_FSL* to the CFG_SYS namespace.

Signed-off-by: Tom Rini &lt;trini@konsulko.com&gt;
Reviewed-by: Simon Glass &lt;sjg@chromium.org&gt;
</content>
</entry>
<entry>
<title>crypto/fsl: fsl_rsa: Fix dcache issue in the driver</title>
<updated>2022-10-21T09:54:13Z</updated>
<author>
<name>Ye Li</name>
<email>ye.li@nxp.com</email>
</author>
<published>2022-09-28T10:19:02Z</published>
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<id>urn:sha1:eda25c11b887ae952da2205ed1c8db751dbf4d11</id>
<content type='text'>
issue:
CAAM fails with key error when perform Modular Exponentiation
using PKHA Block in CAAM

Fix:
add flush and invalidate dcache for keys, signature
and output decrypted data processed by CAAM.

Fixes: 34276478f7 (DM: crypto/fsl - Add Freescale rsa DM driver)
Signed-off-by: Ye Li &lt;ye.li@nxp.com&gt;
Reviewed-by: Gaurav Jain &lt;gaurav.jain@nxp.com&gt;
Acked-by: Peng Fan &lt;peng.fan@nxp.com&gt;
</content>
</entry>
<entry>
<title>dm: core: Drop ofnode_is_available()</title>
<updated>2022-09-29T20:11:31Z</updated>
<author>
<name>Simon Glass</name>
<email>sjg@chromium.org</email>
</author>
<published>2022-09-07T02:27:17Z</published>
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<id>urn:sha1:8909066199281b86bf4ee7673ec6d7983dd12a26</id>
<content type='text'>
This function is also available as ofnode_is_enabled(), so use that
instead.

Signed-off-by: Simon Glass &lt;sjg@chromium.org&gt;
</content>
</entry>
<entry>
<title>crypto/fsl: fsl_hash: Fix crash in flush dcache</title>
<updated>2022-09-18T20:56:09Z</updated>
<author>
<name>Gaurav Jain</name>
<email>gaurav.jain@nxp.com</email>
</author>
<published>2022-07-29T10:02:23Z</published>
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<id>urn:sha1:41460786884691a804091c4b1f125be68e4a0820</id>
<content type='text'>
wrong end address passed to flush_dcache_range.
modified the flush_dache logic for scatter list elements.

Fixes: 1919f58a8f (crypto/fsl: fsl_hash: Fix dcache issue in caam_hash_finish)
Signed-off-by: Gaurav Jain &lt;gaurav.jain@nxp.com&gt;
</content>
</entry>
<entry>
<title>Convert CONFIG_SYS_FSL_MAX_NUM_OF_SEC to Kconfig</title>
<updated>2022-08-12T20:10:49Z</updated>
<author>
<name>Tom Rini</name>
<email>trini@konsulko.com</email>
</author>
<published>2022-08-01T01:08:26Z</published>
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<id>urn:sha1:c6eec0182a9823e6238f34bd177f27330b0ad52d</id>
<content type='text'>
This converts the following to Kconfig:
   CONFIG_SYS_FSL_MAX_NUM_OF_SEC

Signed-off-by: Tom Rini &lt;trini@konsulko.com&gt;
</content>
</entry>
<entry>
<title>crypto: fsl_hash: Remove unnecessary alignment check in caam_hash()</title>
<updated>2022-06-16T19:22:54Z</updated>
<author>
<name>Stefan Roese</name>
<email>sr@denx.de</email>
</author>
<published>2022-04-29T13:34:44Z</published>
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<id>urn:sha1:41b2182af73efcdfd074570976264dddacee5b70</id>
<content type='text'>
While working on an LX2160 based board and updating to latest mainline
I noticed problems using the HW accelerated hash functions on this
platform, when trying to boot a FIT Kernel image. Here the resulting
error message:

   Using 'conf-freescale_lx2160a.dtb' configuration
   Trying 'kernel-1' kernel subimage
   Verifying Hash Integrity ... sha256Error: Address arguments are not aligned
CAAM was not setup properly or it is faulty
 error!
Bad hash value for 'hash-1' hash node in 'kernel-1' image node
Bad Data Hash
ERROR: can't get kernel image!

Testing and checking with Gaurav Jain from NXP has revealed, that this
alignment check is not necessary here at all. So let's remove this
check completely.

Signed-off-by: Stefan Roese &lt;sr@denx.de&gt;
Cc: Gaurav Jain &lt;gaurav.jain@nxp.com&gt;
Cc: dullfire@yahoo.com
Reviewed-by: Gaurav Jain &lt;gaurav.jain@nxp.com&gt;
</content>
</entry>
<entry>
<title>crypto/fsl: fsl_hash: Fix dcache issue in caam_hash_finish</title>
<updated>2022-05-20T10:36:47Z</updated>
<author>
<name>Gaurav Jain</name>
<email>gaurav.jain@nxp.com</email>
</author>
<published>2022-05-11T08:53:19Z</published>
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<id>urn:sha1:1919f58a8f371c19c340127b6a76859867e90247</id>
<content type='text'>
HW accelerated hash operations are giving incorrect hash output.
so add flush and invalidate for input/output hash buffers.

Fixes: 94e3c8c4fd (crypto/fsl - Add progressive hashing support using hardware acceleration.)
Signed-off-by: Gaurav Jain &lt;gaurav.jain@nxp.com&gt;
</content>
</entry>
<entry>
<title>i.MX8 crypto/fsl: Enable fsl CAAM rng driver</title>
<updated>2022-05-19T19:39:36Z</updated>
<author>
<name>Gaurav Jain</name>
<email>gaurav.jain@nxp.com</email>
</author>
<published>2022-04-22T11:08:34Z</published>
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<id>urn:sha1:db74ced5dffc438924ac6ef2780bdb53cab50334</id>
<content type='text'>
rng driver enabled to read random number using caam.

Signed-off-by: Gaurav Jain &lt;gaurav.jain@nxp.com&gt;
</content>
</entry>
<entry>
<title>i.MX6SX: crypto/fsl: fix entropy delay value</title>
<updated>2022-05-19T19:39:36Z</updated>
<author>
<name>Gaurav Jain</name>
<email>gaurav.jain@nxp.com</email>
</author>
<published>2022-04-15T11:10:49Z</published>
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<id>urn:sha1:0c45c77b8aeac0c3c5a0b5ea13a44ee478b51fdb</id>
<content type='text'>
RNG Hardware error is reported due to incorrect entropy delay

rng self test are run to determine the correct ent_dly.
test is executed with different voltage and temperature to identify the
worst case value for ent_dly. after adding a margin value(1000),
ent_dly should be at least 12000.

Signed-off-by: Gaurav Jain &lt;gaurav.jain@nxp.com&gt;
Reviewed-by: Fabio Estevam &lt;festevam@denx.de&gt;
</content>
</entry>
<entry>
<title>crypto/fsl: add invalidate_dcache_range for hash output buffer</title>
<updated>2022-04-21T13:18:25Z</updated>
<author>
<name>Gaurav Jain</name>
<email>gaurav.jain@nxp.com</email>
</author>
<published>2022-04-19T05:22:28Z</published>
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<id>urn:sha1:2c16bf2d14d7fbacafb5473f49487ba7f219e40c</id>
<content type='text'>
HW accelerated hash operations are giving incorrect hash output.
so invalidate cache lines to avoid cache overwriting in DDR memory region.

caam_hash()
 -moved address alignment check in the beginning of function.
 -added invalidate_dcache_range for pout buffer before running descriptor.

Fixes: d7af2baa49 (crypto/fsl: Fix HW accelerated hash commands)
Signed-off-by: Gaurav Jain &lt;gaurav.jain@nxp.com&gt;
Reviewed-by: Fabio Estevam &lt;festevam@denx.de&gt;
</content>
</entry>
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