u-boot.git/drivers/crypto, branch v2016.03

powerpc/SECURE_BOOT: Add PAMU driver

2016-02-24T16:40:55+00:00

PAMU driver basic support for usage in Secure Boot.
In secure boot PAMU is not in bypass mode. Hence to use
any peripheral (SEC Job ring in our case), PAMU has to be
configured.

The patch reverts commit 7cad2e38d61e27ea59fb7944f7e647e97ef292d3.

The Header file pamu.h and few functions in driver have been derived
from Freescale Libos.

Signed-off-by: Ruchika Gupta 
Signed-off-by: Aneesh Bansal 
Reviewed-by: York Sun

drivers/crypto/fsl : Allocate output ring with size aligned to CACHELNE SIZE

2016-02-24T16:40:55+00:00

The output ring needs to be invalidated before enqueuing the job to SEC.
While allocation of space to output ring, it should be taken care that the
size is cacheline size aligned inorder to prevent invalidating valid data.

The patch also correct the method of aligning end of structs while flushing caches

    Since start = align(start_of_struct), it is incorrect to assign
    end = align(start + struct_size). It should instead be,
    end = align(start_of_struct + struct_size).

Signed-off-by: Saksham Jain 
Signed-off-by: Ruchika Gupta 
Reviewed-by: York Sun

imx: Refactoring CAAM Job Ring structure and Secure Memory for imx7

2016-02-21T10:20:54+00:00

Refactored data structure for CAAM's job ring and Secure Memory
to support i.MX7.

The new memory map use macros to resolve SM's offset by version.
This will solve the versioning issue caused by the new version of
secure memory of i.MX7

Signed-off-by: Ulises Cardenas 
Reviewed-by: Stefano Babic

drivers/crypto/fsl: fix endianness issue in RNG

2015-12-15T00:57:35+00:00

For Setting and clearing the bits in SEC Block registers
sec_clrbits32() and sec_setbits32() are used which work as
per endianness of CAAM block.
So these must be used with SEC register address as argument.
If the value is read in a local variable, then the functions
will not behave correctly where endianness of CAAM and core is
different.

Signed-off-by: Aneesh Bansal 
CC: Alex Porosanu 
Reviewed-by: York Sun

crypto/fsl: SEC driver cleanup for 64 bit and endianness

2015-10-29T17:33:57+00:00

The SEC driver code has been cleaned up to work for 64 bit
physical addresses and systems where endianess of SEC block
is different from the Core.
Changes:
1. Descriptor created on Core is modified as per SEC block
   endianness before the job is submitted.
2. The read/write of physical addresses to Job Rings will
   be depend on endianness of SEC block as 32 bit low and
   high part of the 64 bit address will vary.
3. The 32 bit low and high part of the 64 bit address in
   descriptor will vary depending on endianness of SEC.

Signed-off-by: Aneesh Bansal 
Reviewed-by: York Sun

Correct License and Copyright information on few files

2015-08-13T00:47:46+00:00

gpio.h - Added missing copyright in few files.
rsa-mod-exp.h - Corrected copyright in the file.
fsl_sec.h - Added missing license in files
drivers/crypto/fsl/Makefile - Removed the incomplete GPLv2 license and replaced it with GPLv2+ license

Signed-off-by: Ruchika Gupta

drivers: hierarchize drivers Kconfig menu

2015-08-13T00:47:44+00:00

The menuconfig for drivers are getting more and more cluttered
and unreadable because too many entries are displayed in a single
flat menu.  Use hierarchic menu for each category.

Signed-off-by: Masahiro Yamada 
Reviewed-by: Simon Glass 
[trini: Update to apply again in a few places, drop USB hunk]
Signed-off-by: Tom Rini

drivers/crypto/fsl: clean-up - use fdt_setprop_u32 helper

2015-08-03T19:06:38+00:00

Signed-off-by: Horia Geantă 
Acked-by: Ruchika Gupta
Reviewed-by: York Sun

drivers/crypto/fsl: fix snooping for write transactions

2015-08-03T19:06:38+00:00

HW coherency won't work properly for CAAM write transactions
if AWCACHE is left to default (POR) value - 4'b0001.
It has to be programmed to 4'b0010.

For platforms that have HW coherency support:
-PPC-based: the update has no effect; CAAM coherency already works
due to the IOMMU (PAMU) driver setting the correct memory coherency
attributes
-ARM-based: the update fixes cache coherency issues,
since IOMMU (SMMU) driver is not programmed to behave similar to PAMU

Fixes: b9eebfade974c ("fsl_sec: Add hardware accelerated SHA256 and SHA1")
Signed-off-by: Horia Geantă 
Reviewed-by: Aneesh Bansal 
Reviewed-by: Mingkai Hu 
Acked-by: Ruchika Gupta
Reviewed-by: York Sun

drivers/crypto/fsl: fix "era" property value on LE platforms

2015-08-03T19:06:38+00:00

Use fdt_setprop_u32() instead of fdt_setprop().

Fixes: 0181937fa371a ("crypto/fsl: Add fixup for crypto node")
Signed-off-by: Horia Geantă 
Reviewed-by: Mingkai Hu 
Acked-by: Ruchika Gupta
Reviewed-by: York Sun