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<title>u-boot.git/drivers/crypto, branch v2020.10</title>
<subtitle>Unnamed repository; edit this file 'description' to name the repository.
</subtitle>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/'/>
<entry>
<title>crypto/fsl: add RNG support</title>
<updated>2020-07-27T08:46:29+00:00</updated>
<author>
<name>Michael Walle</name>
<email>michael@walle.cc</email>
</author>
<published>2020-06-27T20:58:53+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=ea95f2142e94bfb68c61e5724616f9949b974a4c'/>
<id>ea95f2142e94bfb68c61e5724616f9949b974a4c</id>
<content type='text'>
Register the random number generator with the rng subsystem in u-boot.
This way it can be used by EFI as well as for the 'rng' command.

Signed-off-by: Michael Walle &lt;michael@walle.cc&gt;
Tested-by: Heinrich Schuchardt &lt;xypron.glpk@gmx.de&gt;
Reviewed-by: Priyanka Jain &lt;priyanka.jain@nxp.com&gt;
</content>
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<pre>
Register the random number generator with the rng subsystem in u-boot.
This way it can be used by EFI as well as for the 'rng' command.

Signed-off-by: Michael Walle &lt;michael@walle.cc&gt;
Tested-by: Heinrich Schuchardt &lt;xypron.glpk@gmx.de&gt;
Reviewed-by: Priyanka Jain &lt;priyanka.jain@nxp.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>crypto/fsl: instantiate the RNG with prediciton resistance</title>
<updated>2020-07-27T08:46:29+00:00</updated>
<author>
<name>Michael Walle</name>
<email>michael@walle.cc</email>
</author>
<published>2020-06-27T20:58:52+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=b980f9e2597b52ce71247e79d534349f7d174b38'/>
<id>b980f9e2597b52ce71247e79d534349f7d174b38</id>
<content type='text'>
If it is already instantiated tear it down first and then reinstanciate
it again with prediction resistance.

Signed-off-by: Michael Walle &lt;michael@walle.cc&gt;
Reviewed-by: Priyanka Jain &lt;priyanka.jain@nxp.com&gt;
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<pre>
If it is already instantiated tear it down first and then reinstanciate
it again with prediction resistance.

Signed-off-by: Michael Walle &lt;michael@walle.cc&gt;
Reviewed-by: Priyanka Jain &lt;priyanka.jain@nxp.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>crypto/fsl: don't regenerate secure keys</title>
<updated>2020-07-27T08:46:29+00:00</updated>
<author>
<name>Michael Walle</name>
<email>michael@walle.cc</email>
</author>
<published>2020-06-27T20:58:51+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=c269a970f23fabbb0d35708ff021bf2962780f9f'/>
<id>c269a970f23fabbb0d35708ff021bf2962780f9f</id>
<content type='text'>
The secure keys (TDKEK, JDKEK, TDSK) can only be generated once after a
POR. Otherwise the RNG4 will throw an error.

Signed-off-by: Michael Walle &lt;michael@walle.cc&gt;
Reviewed-by: Horia Geantă &lt;horia.geanta@nxp.com&gt;
Reviewed-by: Priyanka Jain &lt;priyanka.jain@nxp.com&gt;
</content>
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<pre>
The secure keys (TDKEK, JDKEK, TDSK) can only be generated once after a
POR. Otherwise the RNG4 will throw an error.

Signed-off-by: Michael Walle &lt;michael@walle.cc&gt;
Reviewed-by: Horia Geantă &lt;horia.geanta@nxp.com&gt;
Reviewed-by: Priyanka Jain &lt;priyanka.jain@nxp.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>crypto/fsl: support newer SEC modules</title>
<updated>2020-07-27T08:46:29+00:00</updated>
<author>
<name>Michael Walle</name>
<email>michael@walle.cc</email>
</author>
<published>2020-06-27T20:58:50+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=0dc596127c55e5430bd8f213e41a24c8f440c01a'/>
<id>0dc596127c55e5430bd8f213e41a24c8f440c01a</id>
<content type='text'>
Since Era 10, the version registers changed. Add the version registers
and use them on newer modules.

Signed-off-by: Michael Walle &lt;michael@walle.cc&gt;
Reviewed-by: Horia Geantă &lt;horia.geanta@nxp.com&gt;
Reviewed-by: Priyanka Jain &lt;priyanka.jain@nxp.com&gt;
</content>
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<pre>
Since Era 10, the version registers changed. Add the version registers
and use them on newer modules.

Signed-off-by: Michael Walle &lt;michael@walle.cc&gt;
Reviewed-by: Horia Geantă &lt;horia.geanta@nxp.com&gt;
Reviewed-by: Priyanka Jain &lt;priyanka.jain@nxp.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>crypto/fsl: export caam_get_era()</title>
<updated>2020-07-27T08:46:29+00:00</updated>
<author>
<name>Michael Walle</name>
<email>michael@walle.cc</email>
</author>
<published>2020-06-27T20:58:49+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=277405b86ce112e5be39d75ceccb4f0b4e45e1dc'/>
<id>277405b86ce112e5be39d75ceccb4f0b4e45e1dc</id>
<content type='text'>
We need the era in other modules, too. For example, to get the RNG
version.

Signed-off-by: Michael Walle &lt;michael@walle.cc&gt;
Reviewed-by: Horia Geantă &lt;horia.geanta@nxp.com&gt;
Reviewed-by: Priyanka Jain &lt;priyanka.jain@nxp.com&gt;
</content>
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<pre>
We need the era in other modules, too. For example, to get the RNG
version.

Signed-off-by: Michael Walle &lt;michael@walle.cc&gt;
Reviewed-by: Horia Geantă &lt;horia.geanta@nxp.com&gt;
Reviewed-by: Priyanka Jain &lt;priyanka.jain@nxp.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>crypto/fsl: make SEC%u status line consistent</title>
<updated>2020-07-27T08:46:28+00:00</updated>
<author>
<name>Michael Walle</name>
<email>michael@walle.cc</email>
</author>
<published>2020-06-27T20:58:48+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=9b86bf2d1438bb7d3e500e19b641a30ebec70ed8'/>
<id>9b86bf2d1438bb7d3e500e19b641a30ebec70ed8</id>
<content type='text'>
Align the status line with all the other output in U-Boot.

Before the change:
DDR    3.9 GiB (DDR3, 32-bit, CL=11, ECC on)
SEC0: RNG instantiated
WDT:   Started with servicing (60s timeout)

After the change:
DDR    3.9 GiB (DDR3, 32-bit, CL=11, ECC on)
SEC0:  RNG instantiated
WDT:   Started with servicing (60s timeout)

Signed-off-by: Michael Walle &lt;michael@walle.cc&gt;
Reviewed-by: Horia Geantă &lt;horia.geanta@nxp.com&gt;
Reviewed-by: Priyanka Jain &lt;priyanka.jain@nxp.com&gt;
</content>
<content type='xhtml'>
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<pre>
Align the status line with all the other output in U-Boot.

Before the change:
DDR    3.9 GiB (DDR3, 32-bit, CL=11, ECC on)
SEC0: RNG instantiated
WDT:   Started with servicing (60s timeout)

After the change:
DDR    3.9 GiB (DDR3, 32-bit, CL=11, ECC on)
SEC0:  RNG instantiated
WDT:   Started with servicing (60s timeout)

Signed-off-by: Michael Walle &lt;michael@walle.cc&gt;
Reviewed-by: Horia Geantă &lt;horia.geanta@nxp.com&gt;
Reviewed-by: Priyanka Jain &lt;priyanka.jain@nxp.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>crypto/fsl: unused value in caam_hash_update()</title>
<updated>2020-07-27T08:46:28+00:00</updated>
<author>
<name>Heinrich Schuchardt</name>
<email>xypron.glpk@gmx.de</email>
</author>
<published>2020-06-27T08:13:55+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=317fff59091f8a2a4f177a8335df85a705c36139'/>
<id>317fff59091f8a2a4f177a8335df85a705c36139</id>
<content type='text'>
The value 0 assigned to final is overwritten before ever being used.

Remove the assignment.

Signed-off-by: Heinrich Schuchardt &lt;xypron.glpk@gmx.de&gt;
Reviewed-by: Simon Glass &lt;sjg@chromium.org&gt;
Reviewed-by: Priyanka Jain &lt;priyanka.jain@nxp.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
The value 0 assigned to final is overwritten before ever being used.

Remove the assignment.

Signed-off-by: Heinrich Schuchardt &lt;xypron.glpk@gmx.de&gt;
Reviewed-by: Simon Glass &lt;sjg@chromium.org&gt;
Reviewed-by: Priyanka Jain &lt;priyanka.jain@nxp.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>crypto/fsl: correct printf() statement.</title>
<updated>2020-07-27T08:46:28+00:00</updated>
<author>
<name>Heinrich Schuchardt</name>
<email>xypron.glpk@gmx.de</email>
</author>
<published>2020-06-27T08:08:49+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=32e4b65d9646cfe5b2d4796cc19f430ad6f48ec8'/>
<id>32e4b65d9646cfe5b2d4796cc19f430ad6f48ec8</id>
<content type='text'>
The sequence of arguments should match the format string.
For printing unsigned numbers we should use %u.

Signed-off-by: Heinrich Schuchardt &lt;xypron.glpk@gmx.de&gt;
Reviewed-by: Priyanka Jain &lt;priyanka.jain@nxp.com&gt;
</content>
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<pre>
The sequence of arguments should match the format string.
For printing unsigned numbers we should use %u.

Signed-off-by: Heinrich Schuchardt &lt;xypron.glpk@gmx.de&gt;
Reviewed-by: Priyanka Jain &lt;priyanka.jain@nxp.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>crypto/fsl: fix unaligned access</title>
<updated>2020-07-27T08:46:28+00:00</updated>
<author>
<name>Michael Walle</name>
<email>michael@walle.cc</email>
</author>
<published>2020-06-04T19:05:33+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=30325c2c4fb35fcac3b0125b1260bfdac7f45dff'/>
<id>30325c2c4fb35fcac3b0125b1260bfdac7f45dff</id>
<content type='text'>
On aarch64 running with dcache off, will result in an unaligned access
exception:

   =&gt; dcache off
   =&gt; hash sha1 $kernel_addr_r 100
   "Synchronous Abort" handler, esr 0x96000061
   elr: 00000000960317d8 lr : 00000000960316a4 (reloc)
   elr: 00000000fbd787d8 lr : 00000000fbd786a4
   [..]

The compiler emits a "stur x1, [x0, #12]". x1 is might just be 32 bit
aligned pointer. Remove the unused u64 element from the union to drop
the minimal alignment to 32 bit. Also remove the union, because it is
no more needed.

Signed-off-by: Michael Walle &lt;michael@walle.cc&gt;
Reviewed-by: Priyanka Jain &lt;priyanka.jain@nxp.com&gt;
</content>
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<pre>
On aarch64 running with dcache off, will result in an unaligned access
exception:

   =&gt; dcache off
   =&gt; hash sha1 $kernel_addr_r 100
   "Synchronous Abort" handler, esr 0x96000061
   elr: 00000000960317d8 lr : 00000000960316a4 (reloc)
   elr: 00000000fbd787d8 lr : 00000000fbd786a4
   [..]

The compiler emits a "stur x1, [x0, #12]". x1 is might just be 32 bit
aligned pointer. Remove the unused u64 element from the union to drop
the minimal alignment to 32 bit. Also remove the union, because it is
no more needed.

Signed-off-by: Michael Walle &lt;michael@walle.cc&gt;
Reviewed-by: Priyanka Jain &lt;priyanka.jain@nxp.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>drivers: crypto: mod_exp_sw: Re-add DM_FLAG_PRE_RELOC</title>
<updated>2020-05-19T18:01:47+00:00</updated>
<author>
<name>Jan Kiszka</name>
<email>jan.kiszka@siemens.com</email>
</author>
<published>2020-05-07T18:36:03+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=cf2d07f004367e7b48fb1d21a31a0818adb0374a'/>
<id>cf2d07f004367e7b48fb1d21a31a0818adb0374a</id>
<content type='text'>
This driver is safe to use in SPL without relocation. Denying
DM_FLAG_PRE_RELOC prevents its usability for verifying the main U-Boot
or other artifacts from the SPL unless needless enabling the full driver
set (SPL_OF_PLATDATA).

Fixes: 17e117408571 ("drivers: crypto: rsa_mod_exp: avoid DM_FLAG_PRE_RELOC")
CC: Heinrich Schuchardt &lt;xypron.glpk@gmx.de&gt;
CC: Marek Vasut &lt;marex@denx.de&gt;
Signed-off-by: Jan Kiszka &lt;jan.kiszka@siemens.com&gt;
</content>
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<pre>
This driver is safe to use in SPL without relocation. Denying
DM_FLAG_PRE_RELOC prevents its usability for verifying the main U-Boot
or other artifacts from the SPL unless needless enabling the full driver
set (SPL_OF_PLATDATA).

Fixes: 17e117408571 ("drivers: crypto: rsa_mod_exp: avoid DM_FLAG_PRE_RELOC")
CC: Heinrich Schuchardt &lt;xypron.glpk@gmx.de&gt;
CC: Marek Vasut &lt;marex@denx.de&gt;
Signed-off-by: Jan Kiszka &lt;jan.kiszka@siemens.com&gt;
</pre>
</div>
</content>
</entry>
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