u-boot.git/drivers/crypto, branch v2022.01 Unnamed repository; edit this file 'description' to name the repository. board: fsl_validate: Fix Double free Issue 2021-11-09T09:13:24+00:00 Kshitiz Varshney kshitiz.varshney@nxp.com 2021-09-19T15:09:53+00:00 bd2a4eb977232c7062489251cdb5a36a99757fc1 Remove Double free issue from calc_img_key_hash() and calc_esbchdr_esbc_hash() function. Verified the secure boot changes using lx2162aqds board. Signed-off-by: Kshitiz Varshney <kshitiz.varshney@nxp.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com> 
Remove Double free issue from calc_img_key_hash() and
calc_esbchdr_esbc_hash() function.
Verified the secure boot changes using lx2162aqds board.

Signed-off-by: Kshitiz Varshney <kshitiz.varshney@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
WS cleanup: remove SPACE(s) followed by TAB 2021-09-30T13:08:16+00:00 Wolfgang Denk wd@denx.de 2021-09-27T15:42:39+00:00 0cf207ec01cbacae47585fcc26591dd2296507d6 Signed-off-by: Wolfgang Denk <wd@denx.de> 
Signed-off-by: Wolfgang Denk <wd@denx.de>
Merge tag 'v2021.10-rc4' into next 2021-09-16T14:29:40+00:00 Tom Rini trini@konsulko.com 2021-09-16T14:29:40+00:00 6674edaabfd271471608146806f5b6540bc76a1b Prepare v2021.10-rc4 Signed-off-by: Tom Rini <trini@konsulko.com> # gpg: Signature made Tue 14 Sep 2021 06:58:32 PM EDT # gpg: using RSA key 1A3C7F70E08FAB1707809BBF147C39FF9634B72C # gpg: Good signature from "Thomas Rini <trini@konsulko.com>" [ultimate] # Conflicts: # board/Arcturus/ucp1020/spl.c # cmd/mvebu/Kconfig # common/Kconfig.boot # common/image-fit.c # configs/UCP1020_defconfig # configs/sifive_unmatched_defconfig # drivers/pci/Kconfig # include/configs/UCP1020.h # include/configs/sifive-unmatched.h # lib/Makefile # scripts/config_whitelist.txt 
Prepare v2021.10-rc4

Signed-off-by: Tom Rini <trini@konsulko.com>

# gpg: Signature made Tue 14 Sep 2021 06:58:32 PM EDT
# gpg:                using RSA key 1A3C7F70E08FAB1707809BBF147C39FF9634B72C
# gpg: Good signature from "Thomas Rini <trini@konsulko.com>" [ultimate]

# Conflicts:
#	board/Arcturus/ucp1020/spl.c
#	cmd/mvebu/Kconfig
#	common/Kconfig.boot
#	common/image-fit.c
#	configs/UCP1020_defconfig
#	configs/sifive_unmatched_defconfig
#	drivers/pci/Kconfig
#	include/configs/UCP1020.h
#	include/configs/sifive-unmatched.h
#	lib/Makefile
#	scripts/config_whitelist.txt
image: Drop if/elseif hash selection in calculate_hash() 2021-09-08T20:12:09+00:00 Alexandru Gagniuc mr.nuke.me@gmail.com 2021-09-03T00:54:21+00:00 92055e138f2873034e2dfd7e1308e30c9bbef3b1 calculate_hash() would try to select the appropriate hashing function by a if/elseif contruct. But that is exactly why hash_lookup_algo() exists, so use it instead. This does mean that we now have to 'select HASH' to make sure we get the hash_lookup_algo() symbol. However, the change makes sense because even basic FITs will have to deal with "hash" nodes. My only concern is that the 'select SPL_HASH' might cause some platform to grow above its SPL size allowance Signed-off-by: Alexandru Gagniuc <mr.nuke.me@gmail.com> [trini: Make FSL_CAAM be implied only on ARM && SPL] Signed-off-by: Tom Rini <trini@konsulko.com> 
calculate_hash() would try to select the appropriate hashing function
by a if/elseif contruct. But that is exactly why hash_lookup_algo()
exists, so use it instead.

This does mean that we now have to 'select HASH' to make sure we get
the hash_lookup_algo() symbol. However, the change makes sense because
even basic FITs will have to deal with "hash" nodes.

My only concern is that the 'select SPL_HASH' might cause some
platform to grow above its SPL size allowance

Signed-off-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
[trini: Make FSL_CAAM be implied only on ARM && SPL]
Signed-off-by: Tom Rini <trini@konsulko.com>
crypto: hash: Add software hash DM driver 2021-09-01T23:25:37+00:00 Chia-Wei Wang chiawei_wang@aspeedtech.com 2021-07-30T01:08:04+00:00 e5d870fa1ecbcd4efcc13fa6d69c6754e39cff62 Add purely software-implmented drivers to support multiple hash operations including CRC, MD5, and SHA family. This driver is based on the new hash uclass. Signed-off-by: Chia-Wei Wang <chiawei_wang@aspeedtech.com> 
Add purely software-implmented drivers to support multiple
hash operations including CRC, MD5, and SHA family.

This driver is based on the new hash uclass.

Signed-off-by: Chia-Wei Wang <chiawei_wang@aspeedtech.com>
dm: hash: Add new UCLASS_HASH support 2021-09-01T23:25:37+00:00 Chia-Wei Wang chiawei_wang@aspeedtech.com 2021-07-30T01:08:03+00:00 4deaff791cd44e95e545ad8cd74dea25b4993499 Add UCLASS_HASH for hash driver development. Thus the hash drivers (SW or HW-accelerated) can be developed in the DM-based fashion. Signed-off-by: Chia-Wei Wang <chiawei_wang@aspeedtech.com> 
Add UCLASS_HASH for hash driver development. Thus the
hash drivers (SW or HW-accelerated) can be developed
in the DM-based fashion.

Signed-off-by: Chia-Wei Wang <chiawei_wang@aspeedtech.com>
crypto/fsl: fix missed dma_addr_t -> caam_dma_addr_t conversion 2021-08-18T10:25:15+00:00 Horia Geantă horia.geanta@nxp.com 2021-08-10T14:12:19+00:00 cb0db5b948aacead6816873870d8f23b654b8a5f One of the "dma_addr_t" instances was left out when converting to "caam_dma_addr_t". Fixes: 2ff17d2f74c5 ("crypto: fsl: refactor for 32 bit version CAAM support on ARM64") Signed-off-by: Horia Geantă <horia.geanta@nxp.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com> 
One of the "dma_addr_t" instances was left out when
converting to "caam_dma_addr_t".

Fixes: 2ff17d2f74c5 ("crypto: fsl: refactor for 32 bit version CAAM support on ARM64")
Signed-off-by: Horia Geantă <horia.geanta@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
dm: define LOG_CATEGORY for all uclass 2021-07-06T16:38:03+00:00 Patrick Delaunay patrick.delaunay@foss.st.com 2021-04-27T09:02:19+00:00 b953ec2bca1ebe059366e870eb4bec5e7af9c36b Define LOG_CATEGORY for all uclass to allow filtering with log command. Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com> Reviewed-by: Simon Glass <sjg@chromium.org> 
Define LOG_CATEGORY for all uclass to allow filtering with
log command.

Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
crypto: fsl: refactor for 32 bit version CAAM support on ARM64 2021-04-08T18:29:53+00:00 Ye Li ye.li@nxp.com 2021-03-25T09:30:36+00:00 2ff17d2f74c544111478437971a7dd15d3468c02 Previous patch "MLK-18044-4: crypto: caam: Fix pointer size to 32bit for i.MX8M" breaks the 64 bits CAAM. Since i.MX CAAM are all 32 bits no matter the ARM arch (32 or 64), to adapt and not break 64 bits CAAM support, add a new config CONFIG_CAAM_64BIT and new relevant type "caam_dma_addr_t". This config is default enabled when CONFIG_PHYS_64BIT is set except for iMX8M. Signed-off-by: Ye Li <ye.li@nxp.com> Reviewed-by: Horia Geantă <horia.geanta@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com> 
Previous patch "MLK-18044-4: crypto: caam: Fix pointer size to 32bit
for i.MX8M" breaks the 64 bits CAAM.

Since i.MX CAAM are all 32 bits no matter the ARM arch (32 or 64),
to adapt and not break 64 bits CAAM support,  add a new config
CONFIG_CAAM_64BIT and new relevant type "caam_dma_addr_t".

This config is default enabled when CONFIG_PHYS_64BIT is set except
for iMX8M.

Signed-off-by: Ye Li <ye.li@nxp.com>
Reviewed-by: Horia Geantă <horia.geanta@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
fsl_mfgprot: Fix typo in sign_mppubk() 2021-04-08T18:29:52+00:00 Breno Lima breno.lima@nxp.com 2021-03-25T09:30:35+00:00 58fc03e2a65884c17841dd4eee58c97bbeb2297b The signature is generated using manufacturing protection private key. Fix typo in fsl_mfgprot.c. Signed-off-by: Breno Lima <breno.lima@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com> 
The signature is generated using manufacturing protection private key.

Fix typo in fsl_mfgprot.c.

Signed-off-by: Breno Lima <breno.lima@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>