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<title>u-boot.git/drivers/crypto, branch v2022.10</title>
<subtitle>Unnamed repository; edit this file 'description' to name the repository.
</subtitle>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/'/>
<entry>
<title>crypto/fsl: fsl_hash: Fix crash in flush dcache</title>
<updated>2022-09-18T20:56:09+00:00</updated>
<author>
<name>Gaurav Jain</name>
<email>gaurav.jain@nxp.com</email>
</author>
<published>2022-07-29T10:02:23+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=41460786884691a804091c4b1f125be68e4a0820'/>
<id>41460786884691a804091c4b1f125be68e4a0820</id>
<content type='text'>
wrong end address passed to flush_dcache_range.
modified the flush_dache logic for scatter list elements.

Fixes: 1919f58a8f (crypto/fsl: fsl_hash: Fix dcache issue in caam_hash_finish)
Signed-off-by: Gaurav Jain &lt;gaurav.jain@nxp.com&gt;
</content>
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<pre>
wrong end address passed to flush_dcache_range.
modified the flush_dache logic for scatter list elements.

Fixes: 1919f58a8f (crypto/fsl: fsl_hash: Fix dcache issue in caam_hash_finish)
Signed-off-by: Gaurav Jain &lt;gaurav.jain@nxp.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>Convert CONFIG_SYS_FSL_MAX_NUM_OF_SEC to Kconfig</title>
<updated>2022-08-12T20:10:49+00:00</updated>
<author>
<name>Tom Rini</name>
<email>trini@konsulko.com</email>
</author>
<published>2022-08-01T01:08:26+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=c6eec0182a9823e6238f34bd177f27330b0ad52d'/>
<id>c6eec0182a9823e6238f34bd177f27330b0ad52d</id>
<content type='text'>
This converts the following to Kconfig:
   CONFIG_SYS_FSL_MAX_NUM_OF_SEC

Signed-off-by: Tom Rini &lt;trini@konsulko.com&gt;
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<pre>
This converts the following to Kconfig:
   CONFIG_SYS_FSL_MAX_NUM_OF_SEC

Signed-off-by: Tom Rini &lt;trini@konsulko.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>crypto: nuvoton: Add NPCM7xx SHA driver</title>
<updated>2022-06-23T01:30:05+00:00</updated>
<author>
<name>Jim Liu</name>
<email>jim.t90615@gmail.com</email>
</author>
<published>2022-06-07T08:32:09+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=2eeb4ee97ef8ebf92f4097ddba0dfc9654370196'/>
<id>2eeb4ee97ef8ebf92f4097ddba0dfc9654370196</id>
<content type='text'>
add nuvoton BMC npcm750 SHA driver

Signed-off-by: Jim Liu &lt;JJLIU0@nuvoton.com&gt;
</content>
<content type='xhtml'>
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<pre>
add nuvoton BMC npcm750 SHA driver

Signed-off-by: Jim Liu &lt;JJLIU0@nuvoton.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>crypto: nuvoton: Add NPCM7xx AES driver</title>
<updated>2022-06-23T01:30:05+00:00</updated>
<author>
<name>Jim Liu</name>
<email>jim.t90615@gmail.com</email>
</author>
<published>2022-06-07T08:32:08+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=9e03b48dfa6f0ad4a0a4f4411c8cc1da2cd70800'/>
<id>9e03b48dfa6f0ad4a0a4f4411c8cc1da2cd70800</id>
<content type='text'>
add nuvoton BMC npcm750 AES driver

Signed-off-by: Jim Liu &lt;JJLIU0@nuvoton.com&gt;
</content>
<content type='xhtml'>
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<pre>
add nuvoton BMC npcm750 AES driver

Signed-off-by: Jim Liu &lt;JJLIU0@nuvoton.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>crypto: fsl_hash: Remove unnecessary alignment check in caam_hash()</title>
<updated>2022-06-16T19:22:54+00:00</updated>
<author>
<name>Stefan Roese</name>
<email>sr@denx.de</email>
</author>
<published>2022-04-29T13:34:44+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=41b2182af73efcdfd074570976264dddacee5b70'/>
<id>41b2182af73efcdfd074570976264dddacee5b70</id>
<content type='text'>
While working on an LX2160 based board and updating to latest mainline
I noticed problems using the HW accelerated hash functions on this
platform, when trying to boot a FIT Kernel image. Here the resulting
error message:

   Using 'conf-freescale_lx2160a.dtb' configuration
   Trying 'kernel-1' kernel subimage
   Verifying Hash Integrity ... sha256Error: Address arguments are not aligned
CAAM was not setup properly or it is faulty
 error!
Bad hash value for 'hash-1' hash node in 'kernel-1' image node
Bad Data Hash
ERROR: can't get kernel image!

Testing and checking with Gaurav Jain from NXP has revealed, that this
alignment check is not necessary here at all. So let's remove this
check completely.

Signed-off-by: Stefan Roese &lt;sr@denx.de&gt;
Cc: Gaurav Jain &lt;gaurav.jain@nxp.com&gt;
Cc: dullfire@yahoo.com
Reviewed-by: Gaurav Jain &lt;gaurav.jain@nxp.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
While working on an LX2160 based board and updating to latest mainline
I noticed problems using the HW accelerated hash functions on this
platform, when trying to boot a FIT Kernel image. Here the resulting
error message:

   Using 'conf-freescale_lx2160a.dtb' configuration
   Trying 'kernel-1' kernel subimage
   Verifying Hash Integrity ... sha256Error: Address arguments are not aligned
CAAM was not setup properly or it is faulty
 error!
Bad hash value for 'hash-1' hash node in 'kernel-1' image node
Bad Data Hash
ERROR: can't get kernel image!

Testing and checking with Gaurav Jain from NXP has revealed, that this
alignment check is not necessary here at all. So let's remove this
check completely.

Signed-off-by: Stefan Roese &lt;sr@denx.de&gt;
Cc: Gaurav Jain &lt;gaurav.jain@nxp.com&gt;
Cc: dullfire@yahoo.com
Reviewed-by: Gaurav Jain &lt;gaurav.jain@nxp.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>crypto/fsl: fsl_hash: Fix dcache issue in caam_hash_finish</title>
<updated>2022-05-20T10:36:47+00:00</updated>
<author>
<name>Gaurav Jain</name>
<email>gaurav.jain@nxp.com</email>
</author>
<published>2022-05-11T08:53:19+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=1919f58a8f371c19c340127b6a76859867e90247'/>
<id>1919f58a8f371c19c340127b6a76859867e90247</id>
<content type='text'>
HW accelerated hash operations are giving incorrect hash output.
so add flush and invalidate for input/output hash buffers.

Fixes: 94e3c8c4fd (crypto/fsl - Add progressive hashing support using hardware acceleration.)
Signed-off-by: Gaurav Jain &lt;gaurav.jain@nxp.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
HW accelerated hash operations are giving incorrect hash output.
so add flush and invalidate for input/output hash buffers.

Fixes: 94e3c8c4fd (crypto/fsl - Add progressive hashing support using hardware acceleration.)
Signed-off-by: Gaurav Jain &lt;gaurav.jain@nxp.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>i.MX8 crypto/fsl: Enable fsl CAAM rng driver</title>
<updated>2022-05-19T19:39:36+00:00</updated>
<author>
<name>Gaurav Jain</name>
<email>gaurav.jain@nxp.com</email>
</author>
<published>2022-04-22T11:08:34+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=db74ced5dffc438924ac6ef2780bdb53cab50334'/>
<id>db74ced5dffc438924ac6ef2780bdb53cab50334</id>
<content type='text'>
rng driver enabled to read random number using caam.

Signed-off-by: Gaurav Jain &lt;gaurav.jain@nxp.com&gt;
</content>
<content type='xhtml'>
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<pre>
rng driver enabled to read random number using caam.

Signed-off-by: Gaurav Jain &lt;gaurav.jain@nxp.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>i.MX6SX: crypto/fsl: fix entropy delay value</title>
<updated>2022-05-19T19:39:36+00:00</updated>
<author>
<name>Gaurav Jain</name>
<email>gaurav.jain@nxp.com</email>
</author>
<published>2022-04-15T11:10:49+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=0c45c77b8aeac0c3c5a0b5ea13a44ee478b51fdb'/>
<id>0c45c77b8aeac0c3c5a0b5ea13a44ee478b51fdb</id>
<content type='text'>
RNG Hardware error is reported due to incorrect entropy delay

rng self test are run to determine the correct ent_dly.
test is executed with different voltage and temperature to identify the
worst case value for ent_dly. after adding a margin value(1000),
ent_dly should be at least 12000.

Signed-off-by: Gaurav Jain &lt;gaurav.jain@nxp.com&gt;
Reviewed-by: Fabio Estevam &lt;festevam@denx.de&gt;
</content>
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<pre>
RNG Hardware error is reported due to incorrect entropy delay

rng self test are run to determine the correct ent_dly.
test is executed with different voltage and temperature to identify the
worst case value for ent_dly. after adding a margin value(1000),
ent_dly should be at least 12000.

Signed-off-by: Gaurav Jain &lt;gaurav.jain@nxp.com&gt;
Reviewed-by: Fabio Estevam &lt;festevam@denx.de&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>crypto/fsl: add invalidate_dcache_range for hash output buffer</title>
<updated>2022-04-21T13:18:25+00:00</updated>
<author>
<name>Gaurav Jain</name>
<email>gaurav.jain@nxp.com</email>
</author>
<published>2022-04-19T05:22:28+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=2c16bf2d14d7fbacafb5473f49487ba7f219e40c'/>
<id>2c16bf2d14d7fbacafb5473f49487ba7f219e40c</id>
<content type='text'>
HW accelerated hash operations are giving incorrect hash output.
so invalidate cache lines to avoid cache overwriting in DDR memory region.

caam_hash()
 -moved address alignment check in the beginning of function.
 -added invalidate_dcache_range for pout buffer before running descriptor.

Fixes: d7af2baa49 (crypto/fsl: Fix HW accelerated hash commands)
Signed-off-by: Gaurav Jain &lt;gaurav.jain@nxp.com&gt;
Reviewed-by: Fabio Estevam &lt;festevam@denx.de&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
HW accelerated hash operations are giving incorrect hash output.
so invalidate cache lines to avoid cache overwriting in DDR memory region.

caam_hash()
 -moved address alignment check in the beginning of function.
 -added invalidate_dcache_range for pout buffer before running descriptor.

Fixes: d7af2baa49 (crypto/fsl: Fix HW accelerated hash commands)
Signed-off-by: Gaurav Jain &lt;gaurav.jain@nxp.com&gt;
Reviewed-by: Fabio Estevam &lt;festevam@denx.de&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>crypto/fsl: Clear the memory when blob decapsulation fails</title>
<updated>2022-04-21T13:18:25+00:00</updated>
<author>
<name>Gaurav Jain</name>
<email>gaurav.jain@nxp.com</email>
</author>
<published>2022-04-15T11:22:34+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=cc84edddd17ed6eedbd17ad1ab9672854ec5fa27'/>
<id>cc84edddd17ed6eedbd17ad1ab9672854ec5fa27</id>
<content type='text'>
issue: blob decapsulation operation store the decrypted data
       in memory even if ICV check failed.

fix: clear the blob data output memory.

Fixes: c5de15cbc8 (crypto/fsl: Add command for encapsulating/decapsulating blobs)
Signed-off-by: Gaurav Jain &lt;gaurav.jain@nxp.com&gt;
Reviewed-by: Kshitiz Varshney &lt;kshitiz.varshney@nxp.com&gt;
Tested-by: Kshitiz Varshney &lt;kshitiz.varshney@nxp.com&gt;
Reviewed-by: Fabio Estevam &lt;festevam@denx.de&gt;
</content>
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<pre>
issue: blob decapsulation operation store the decrypted data
       in memory even if ICV check failed.

fix: clear the blob data output memory.

Fixes: c5de15cbc8 (crypto/fsl: Add command for encapsulating/decapsulating blobs)
Signed-off-by: Gaurav Jain &lt;gaurav.jain@nxp.com&gt;
Reviewed-by: Kshitiz Varshney &lt;kshitiz.varshney@nxp.com&gt;
Tested-by: Kshitiz Varshney &lt;kshitiz.varshney@nxp.com&gt;
Reviewed-by: Fabio Estevam &lt;festevam@denx.de&gt;
</pre>
</div>
</content>
</entry>
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