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<title>u-boot.git/drivers/ddr/altera, branch v2020.04</title>
<subtitle>Unnamed repository; edit this file 'description' to name the repository.</subtitle>
<id>http://cgit.235523.xyz/u-boot.git/atom/drivers/ddr/altera?h=v2020.04</id>
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<updated>2020-02-11T15:58:41Z</updated>
<entry>
<title>Merge tag 'dm-pull-6feb20' of https://gitlab.denx.de/u-boot/custodians/u-boot-dm</title>
<updated>2020-02-11T15:58:41Z</updated>
<author>
<name>Tom Rini</name>
<email>trini@konsulko.com</email>
</author>
<published>2020-02-11T15:58:41Z</published>
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<id>urn:sha1:9a8942b53d57149754e0dfc975e0d92d1afd4087</id>
<content type='text'>
sandbox conversion to SDL2
TPM TEE driver
Various minor sandbox video enhancements
New driver model core utility functions
</content>
</entry>
<entry>
<title>dm: core: Create a new header file for 'compat' features</title>
<updated>2020-02-06T02:33:46Z</updated>
<author>
<name>Simon Glass</name>
<email>sjg@chromium.org</email>
</author>
<published>2020-02-03T14:36:16Z</published>
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<id>urn:sha1:336d4615f8fa774557d14f9b3245daa9e5fe3dbc</id>
<content type='text'>
At present dm/device.h includes the linux-compatible features. This
requires including linux/compat.h which in turn includes a lot of headers.
One of these is malloc.h which we thus end up including in every file in
U-Boot. Apart from the inefficiency of this, it is problematic for sandbox
which needs to use the system malloc() in some files.

Move the compatibility features into a separate header file.

Signed-off-by: Simon Glass &lt;sjg@chromium.org&gt;
</content>
</entry>
<entry>
<title>ddr: altera: Add DDR2 support to Gen5 driver</title>
<updated>2020-02-05T02:01:57Z</updated>
<author>
<name>Marek Vasut</name>
<email>marex@denx.de</email>
</author>
<published>2019-10-17T22:22:31Z</published>
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<id>urn:sha1:9a5a90ad9b3234c4739427cbe11219c51f0e9bd1</id>
<content type='text'>
Add DDR2 support to Gen5 DRAM driver. As the DDR2 macro names generated
by Quartus are named differently than the DDR3 ones, use anon unions to
store them in the same structures, without growing their size.

Signed-off-by: Marek Vasut &lt;marex@denx.de&gt;
Cc: Ley Foon Tan &lt;ley.foon.tan@intel.com&gt;
Cc: Simon Goldschmidt &lt;simon.k.r.goldschmidt@gmail.com&gt;
</content>
</entry>
<entry>
<title>common: Move hang() to the same header as panic()</title>
<updated>2020-01-17T22:53:40Z</updated>
<author>
<name>Simon Glass</name>
<email>sjg@chromium.org</email>
</author>
<published>2019-12-28T17:45:07Z</published>
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<id>urn:sha1:db41d65a97f335167e1fbc0400a83333b5157703</id>
<content type='text'>
At present panic() is in the vsprintf.h header file. That does not seem
like an obvious choice for hang(), even though it relates to panic(). So
let's put hang() in its own header.

Signed-off-by: Simon Glass &lt;sjg@chromium.org&gt;
[trini: Migrate a few more files]
Signed-off-by: Tom Rini &lt;trini@konsulko.com&gt;
</content>
</entry>
<entry>
<title>common: Move RAM-sizing functions to init.h</title>
<updated>2020-01-17T19:02:35Z</updated>
<author>
<name>Simon Glass</name>
<email>sjg@chromium.org</email>
</author>
<published>2019-12-28T17:45:05Z</published>
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<id>urn:sha1:9b4a205f454dd19687aaf9a22a5bc01164182a90</id>
<content type='text'>
These functions relate to memory init so move them into the init
header.

Signed-off-by: Simon Glass &lt;sjg@chromium.org&gt;
</content>
</entry>
<entry>
<title>ddr: socfpga: Enable ARM64 Non-Secure SDRAM ECC Access</title>
<updated>2020-01-07T13:38:34Z</updated>
<author>
<name>Thor Thayer</name>
<email>thor.thayer@linux.intel.com</email>
</author>
<published>2019-12-06T19:47:32Z</published>
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<id>urn:sha1:8097aee3abc3b773aceea01f756a38b34b274e1e</id>
<content type='text'>
The ECC registers in the SDRAM HMC Adapter should always
be accessible (both when ECC is enabled and disabled).
Currently, the registers are accessible only when ECC is enabled.

The ECC Enabled bit is used to determine the status of
ECC by later OSes so always allow access.

Signed-off-by: Thor Thayer &lt;thor.thayer@linux.intel.com&gt;
Reviewed-by: Ley Foon Tan &lt;ley.foon.tan@intel.com&gt;
</content>
</entry>
<entry>
<title>arm: socfpga: stratix10: Enable SMMU access</title>
<updated>2020-01-07T13:38:34Z</updated>
<author>
<name>Thor Thayer</name>
<email>thor.thayer@linux.intel.com</email>
</author>
<published>2019-12-06T19:47:31Z</published>
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<id>urn:sha1:62079b2211e113f8ee395025d1213f91e1da219e</id>
<content type='text'>
Enable TCU access through the Stratix10 CCU so that the
SMMU can access the SDRAM.

Signed-off-by: Thor Thayer &lt;thor.thayer@linux.intel.com&gt;
Reviewed-by: Ley Foon Tan &lt;ley.foon.tan@intel.com&gt;
</content>
</entry>
<entry>
<title>ddr: altera: agilex: Add SDRAM driver for Agilex</title>
<updated>2020-01-07T13:38:33Z</updated>
<author>
<name>Ley Foon Tan</name>
<email>ley.foon.tan@intel.com</email>
</author>
<published>2019-11-27T07:55:27Z</published>
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<id>urn:sha1:6a48c34c250e41765951586d3389c0df69b2dbe1</id>
<content type='text'>
Add SDRAM driver for Agilex SoC.

Signed-off-by: Tien Fong Chee &lt;tien.fong.chee@intel.com&gt;
Signed-off-by: Ley Foon Tan &lt;ley.foon.tan@intel.com&gt;
Reviewed-by: Simon Goldschmidt &lt;simon.k.r.goldschmidt@gmail.com&gt;
</content>
</entry>
<entry>
<title>ddr: altera: Restructure Stratix 10 SDRAM driver</title>
<updated>2020-01-07T13:38:33Z</updated>
<author>
<name>Ley Foon Tan</name>
<email>ley.foon.tan@intel.com</email>
</author>
<published>2019-11-27T07:55:26Z</published>
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<id>urn:sha1:733cc6cbcc1c0f212decabceb71925411d1c277c</id>
<content type='text'>
Restructure Stratix 10 SDRAM driver. Move common code to separate
file, in preparation to support SDRAM driver for Agilex.

Signed-off-by: Ley Foon Tan &lt;ley.foon.tan@intel.com&gt;
Reviewed-by: Simon Goldschmidt &lt;simon.k.r.goldschmidt@gmail.com&gt;
</content>
</entry>
<entry>
<title>arm: socfpga: Move Stratix10 and Agilex system manager common code</title>
<updated>2020-01-07T13:38:33Z</updated>
<author>
<name>Ley Foon Tan</name>
<email>ley.foon.tan@intel.com</email>
</author>
<published>2019-11-27T07:55:18Z</published>
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<id>urn:sha1:2fd1dc5593d6ea0266797009dd702279fd10f7d1</id>
<content type='text'>
Move Stratix10 and Agilex system manager common code to
system_manager_soc64.h. Changed macros to use SYSMGR_SOC64_*.

Signed-off-by: Ley Foon Tan &lt;ley.foon.tan@intel.com&gt;
Reviewed-by: Simon Goldschmidt &lt;simon.k.r.goldschmidt@gmail.com&gt;
</content>
</entry>
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