u-boot.git/drivers/ddr/fsl, branch v2016.07

driver/ddr/fsl: Check condition for erratum A-009803

2016-06-03T21:12:49Z

Add condition of checking the enabled of address parity for erratum A-009803, if parity is not enabled, the workaround of erratum A-009803 should not be applied. Signed-off-by: Shengzhou Liu Reviewed-by: York Sun

drivers/ddr/fsl: Disabling data init if ECC is not enabled

2016-06-03T21:12:48Z

If ECC is not enabled, data init can be disabled to speed up booting. Signed-off-by: York Sun

drivers/ddr/fsl: Fix timing_cfg_2 register

2016-06-03T21:12:06Z

Commit 34e026f9 added one extra bit to wr_lat for timing_cfg_2, but with wrong bit position. It is bit 13 in big-endian, or left shift 18 from LSB. This error hasn't had any impact because we don't have fast enough DDR4 using the extra bit so far. Signed-off-by: York Sun

drivers/ddr/fsl: Update clk_adjust of sdram_clk_cntl

2016-06-03T21:06:35Z

The clk_adjust is of SDRAM_CLK_CNTL[5:8] 4-bits on MPC85xx and P-series, but is of SDRAM_CLK_CNTL[5:9] 5-bits on T-series and LS-series SoCs. We should update it to adapt the case that clk_adjust is odd data. Signed-off-by: Shengzhou Liu Reviewed-by: York Sun

driver/ddr/fsl: Add workaround for erratum A-010165

2016-05-18T15:51:47Z

During DDR-2133 operation, the transmit data eye margins determined during the memory controller initialization may be sub-optimal, set DEBUG_29[12] and DEBUG_29[13:16] = 4'b0100 before MEM_EN is set. Signed-off-by: Shengzhou Liu Reviewed-by: York Sun

driver/ddr/fsl: Add workaround for erratum A-009801

2016-05-17T16:26:53Z

The initial training for the DDRC may provide results that are not optimized. The workaround provides better read timing margins. Signed-off-by: Shengzhou Liu Reviewed-by: York Sun

drivers/ddr/fsl: update workaround for erratum A-008511

2016-05-17T16:26:42Z

Per the latest erratum document, update step 4 and step 8, only DEBUG_29[21] is changed, all other bits should not be changed. Signed-off-by: Shengzhou Liu Reviewed-by: York Sun

Fix typo choosen in comments and printf logs

2016-03-27T13:12:23Z

Minor change: chosen is written with one "o". No code change here, only comment & printf. Signed-off-by: Alexander Merkle Reviewed-by: Bin Meng

driver/ddr/fsl: Add workaround for erratum A-009803

2016-03-21T19:42:13Z

During initial DDR training, false parity errors may be detected. This patch adds workaround to fix the erratum. Tested on LS2085QDS and LS2080RDB. Signed-off-by: Shengzhou Liu Reviewed-by: York Sun

driver/ddr/fsl: Add address parity support for DDR4 UDIMM/discrete

2016-03-21T19:42:13Z

Add support of address parity for DDR4 UDIMM or discrete memory. It requires to configurate corresponding MR5[2:0] and TIMING_CFG_7[PAR_LAT]. Parity can be turned on by hwconfig, e.g. hwconfig=fsl_ddr:parity=on. Signed-off-by: Shengzhou Liu Reviewed-by: York Sun