u-boot.git/drivers/ddr/fsl, branch v2016.11

Merge git://git.denx.de/u-boot-fsl-qoriq

2016-09-26T21:10:56Z

trini: Drop local memset() from examples/standalone/mem_to_mem_idma2intr.c Signed-off-by: Tom Rini

driver: ddr: fsl_mmdc: Pass board parameters through data structure

2016-09-26T15:53:07Z

Instead of using multiple macros, a data structure is used to pass board-specific parameters to MMDC DDR driver. Signed-off-by: York Sun CC: Shengzhou Liu Reviewed-by: Tom Rini

drivers: squash lines for immediate return

2016-09-23T21:53:54Z

Remove unneeded variables and assignments. Signed-off-by: Masahiro Yamada

ddr: fsl: fix a compile issue

2016-09-14T21:09:22Z

When CONFIG_SYS_FSL_ERRATUM_A009801 is defined but CONFIG_SYS_FSL_ERRATUM_A008511 not defined, there is compile error that temp32 undeclared, this patch fixes it. Signed-off-by: Shaohui Xie Signed-off-by: Gong Qianyu Reviewed-by: York Sun

driver/ddr/fsl: Add general MMDC driver and reuse common MMDC driver for ls1012a

2016-09-14T21:08:22Z

This general MMDC driver adds basic support for Freescale MMDC (Multi Mode DDR Controller). Currently MMDC is integrated on ARMv8 LS1012A SoC for DDR3L, there will be a update to this driver to support more flexible configuration if new features (DDR4, multiple controllers/chip selections, etc) are implimented in future. Meantime, reuse common MMDC driver for LS1012ARDB/LS1012AQDS/ LS1012AFRDM. Signed-off-by: Shengzhou Liu Reviewed-by: York Sun

driver/ddr/fsl: Revise workaround A008511 for A009803

2016-09-14T21:05:38Z

DDR controller 5.2.1 has this erratum A008511 partially fixed. The workaround needs to be adjusted to take advantage of Vref training. This patch enables the training and force output enable to be off. Erratum A009803 requires the controller to be idel before enabling address parity. It was combined with workaround for A008511. With new A008511 flow, this flow needs to be changed to enabling data init (D_INIT) after the address parity is enabled. Signed-off-by: York Sun Signed-off-by: Shengzhou Liu

driver/ddr/fsl: Add more debug registers

2016-09-14T21:05:32Z

32 more debug registers are added for newer DDR controllers. Signed-off-by: York Sun Signed-off-by: Shengzhou Liu

driver/ddr/fsl: Fix timing_cfg_2

2016-08-02T16:47:34Z

Commit 5605dc6 tried to fix wr_lat bit in timing_cfg_2, but the change was wrong. wr_lat has 5 bits with MSB at [13] and lower 4 bits at [9:12], in big-endian convention. Signed-off-by: York Sun Reported-by: Thomas Schaefer

Various, unrelated tree-wide typo fixes.

2016-07-16T13:43:12Z

Fix a number of typos, including: * "compatble" -> "compatible" * "eanbeld" -> "enabled" * "envrionment" -> "environment" * "FTD" -> "FDT" (for "flattened device tree") * "ommitted" -> "omitted" * "overriden" -> "overridden" * "partiton" -> "partition" * "propogate" -> "propagate" * "resourse" -> "resource" * "rest in piece" -> "rest in peace" * "suport" -> "support" * "varible" -> "variable" Signed-off-by: Robert P. J. Day

driver/ddr/fsl: Check condition for erratum A-009803

2016-06-03T21:12:49Z

Add condition of checking the enabled of address parity for erratum A-009803, if parity is not enabled, the workaround of erratum A-009803 should not be applied. Signed-off-by: Shengzhou Liu Reviewed-by: York Sun