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<title>u-boot.git/drivers/ddr/fsl, branch v2020.04</title>
<subtitle>Unnamed repository; edit this file 'description' to name the repository.</subtitle>
<id>http://cgit.235523.xyz/u-boot.git/atom/drivers/ddr/fsl?h=v2020.04</id>
<link rel='self' href='http://cgit.235523.xyz/u-boot.git/atom/drivers/ddr/fsl?h=v2020.04'/>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/'/>
<updated>2020-04-10T11:53:41Z</updated>
<entry>
<title>Revert "mpc85xx: ddr: Always start DDR RAM in Self Refresh mode"</title>
<updated>2020-04-10T11:53:41Z</updated>
<author>
<name>Biwen Li</name>
<email>biwen.li@nxp.com</email>
</author>
<published>2020-04-09T12:44:48Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=159e7a224dc08557f2c4a3ee493377bec4bd8e86'/>
<id>urn:sha1:159e7a224dc08557f2c4a3ee493377bec4bd8e86</id>
<content type='text'>
This reverts commit 2a5d5d27edfbdb0e02a7fcf05569f92c02ae44ee.
The commit breaks uboot boot (hang in ddr init)
on many PowerPC boards like P3041DS, P4080DS

Signed-off-by: Biwen Li &lt;biwen.li@nxp.com&gt;
Signed-off-by: Priyanka Jain &lt;priyanka.jain@nxp.com&gt;
</content>
</entry>
<entry>
<title>mpc85xx: ddr: Always start DDR RAM in Self Refresh mode</title>
<updated>2019-12-23T08:37:55Z</updated>
<author>
<name>Joakim Tjernlund</name>
<email>joakim.tjernlund@infinera.com</email>
</author>
<published>2019-11-27T18:35:10Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=2a5d5d27edfbdb0e02a7fcf05569f92c02ae44ee'/>
<id>urn:sha1:2a5d5d27edfbdb0e02a7fcf05569f92c02ae44ee</id>
<content type='text'>
Some of t1042 boards fails DDR init with an Automatic calibration error
every now and then. Investigations revealed that true Warm boots
never failed. Warm boots has some extra steps performed, one being
to start DDRC in Self Refresh and then clearing SR right after.
Applying this SR method unconditionally made all our boards
stable again, regardless of Cold/Warm boot.

Signed-off-by: Joakim Tjernlund &lt;joakim.tjernlund@infinera.com&gt;
Signed-off-by: Priyanka Jain &lt;priyanka.jain@nxp.com&gt;
</content>
</entry>
<entry>
<title>ddr, fsl: add DM_I2C support</title>
<updated>2019-08-26T15:46:24Z</updated>
<author>
<name>Heiko Schocher</name>
<email>hs@denx.de</email>
</author>
<published>2019-08-26T15:28:34Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=09aa70ffada679c28cea603db9578d8b1c65907b'/>
<id>urn:sha1:09aa70ffada679c28cea603db9578d8b1c65907b</id>
<content type='text'>
add DM_I2C support for this driver.

Signed-off-by: Heiko Schocher &lt;hs@denx.de&gt;
Reviewed-by: Prabhakar Kushwaha &lt;prabhakar.kushwaha@nxp.com&gt;
</content>
</entry>
<entry>
<title>boards: lx2160a: Add support of I2C driver model</title>
<updated>2019-08-22T03:37:35Z</updated>
<author>
<name>Chuanhua Han</name>
<email>chuanhua.han@nxp.com</email>
</author>
<published>2019-07-10T13:00:20Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=0eba65d2013e5517e70cc9b3d467ba8183b54cd9'/>
<id>urn:sha1:0eba65d2013e5517e70cc9b3d467ba8183b54cd9</id>
<content type='text'>
DM_I2C_COMPAT is a compatibility layer that allows using the non-DM I2C
API when DM_I2C is used. When DM_I2C_COMPAT is not enabled for
compilation, a compilation error will be generated. This patch solves
the problem that the i2c-related api of the lx2160a platform does not
support dm.

Signed-off-by: Chuanhua Han &lt;chuanhua.han@nxp.com&gt;
Reviewed-by: Prabhakar Kushwaha &lt;prabhakar.kushwaha@nxp.com&gt;
</content>
</entry>
<entry>
<title>env: Move env_get_f() to env.h</title>
<updated>2019-08-11T20:43:41Z</updated>
<author>
<name>Simon Glass</name>
<email>sjg@chromium.org</email>
</author>
<published>2019-08-01T15:46:42Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=3a7d55716d6bfe5122de9692383357344fff2a94'/>
<id>urn:sha1:3a7d55716d6bfe5122de9692383357344fff2a94</id>
<content type='text'>
Move this function over to the new header file.

Signed-off-by: Simon Glass &lt;sjg@chromium.org&gt;
Acked-by: Joe Hershberger &lt;joe.hershberger@ni.com&gt;
</content>
</entry>
<entry>
<title>mpc83xx: Get rid of CONFIG_SYS_DDR_SDRAM_BASE</title>
<updated>2019-05-21T05:52:33Z</updated>
<author>
<name>Mario Six</name>
<email>mario.six@gdsys.cc</email>
</author>
<published>2019-01-21T08:18:16Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=133ec602846d28a7915a7b3149d05d1c8a270873'/>
<id>urn:sha1:133ec602846d28a7915a7b3149d05d1c8a270873</id>
<content type='text'>
CONFIG_SYS_DDR_SDRAM_BASE is set to the same value as
CONFIG_SYS_SDRAM_BASE on all existing boards. Just use
CONFIG_SYS_SDRAM_BASE instead.

Signed-off-by: Mario Six &lt;mario.six@gdsys.cc&gt;
</content>
</entry>
<entry>
<title>configs: fsl: move DDR specific defines to Kconfig</title>
<updated>2019-03-03T15:26:01Z</updated>
<author>
<name>Rajesh Bhagat</name>
<email>rajesh.bhagat@nxp.com</email>
</author>
<published>2019-02-01T05:22:01Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=32413125b3486c2376d5df6791f1329268725bc9'/>
<id>urn:sha1:32413125b3486c2376d5df6791f1329268725bc9</id>
<content type='text'>
Moves below DDR specific defines to Kconfig:

CONFIG_FSL_DDR_BIST
CONFIG_FSL_DDR_FIRST_SLOT_QUAD_CAPABLE
CONFIG_FSL_DDR_INTERACTIVE
CONFIG_FSL_DDR_SYNC_REFRESH

Signed-off-by: Rajesh Bhagat &lt;rajesh.bhagat@nxp.com&gt;
Reviewed-by: York Sun &lt;york.sun@nxp.com&gt;
Reviewed-by: Prabhakar Kushwaha &lt;prabhakar.kushwaha@nxp.com&gt;
</content>
</entry>
<entry>
<title>drivers/ddr/fsl: Update fsl_ddr_board_options as weak function</title>
<updated>2019-02-19T04:56:43Z</updated>
<author>
<name>Priyanka Jain</name>
<email>priyanka.jain@nxp.com</email>
</author>
<published>2018-10-29T09:37:36Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=50dcbd1ff8ba13323a9a5e1bf516504ba35bd56c'/>
<id>urn:sha1:50dcbd1ff8ba13323a9a5e1bf516504ba35bd56c</id>
<content type='text'>
fsl_ddr_board_options is generally defined in board
board's ddr.c, but some boards like lx2160ardb board
does not need this function.
Defining fsl_ddr_board_options as weak function to
resolve compilation errors for such boards.

Signed-off-by: Priyanka Jain &lt;priyanka.jain@nxp.com&gt;
[PK: Fix checkpatch warnings]
Signed-off-by: Prabhakar Kushwaha &lt;prabhakar.kushwaha@nxp.com&gt;
</content>
</entry>
<entry>
<title>armv8: lx2160a: Add LX2160A SoC Support</title>
<updated>2018-12-06T22:37:19Z</updated>
<author>
<name>Priyanka Jain</name>
<email>priyanka.jain@nxp.com</email>
</author>
<published>2018-10-29T09:17:09Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=4909b89ec763f0c7030fa8474f9b6c5df866b01f'/>
<id>urn:sha1:4909b89ec763f0c7030fa8474f9b6c5df866b01f</id>
<content type='text'>
LX2160A Soc is based on Layerscape Chassis Generation 3.2
architecture with features:
 16 ARM v8 Cortex-A72 cores in 8 cluster, CCN508, SEC,
 2 64-bit DDR4 memory controller, RGMII, 8 I2C controllers,
 3 serdes modules, USB 3.0, SATA, 4 PL011 SBSA UARTs,
 4 TZASC instances, etc.

SoC personalites:
LX2120A is SoC with Twelve 64-bit ARM v8 Cortex-A72 CPUs
LX2080A is SoC with Eight 64-bit ARM v8 Cortex-A72 CPUs

Signed-off-by: Bao Xiaowei &lt;xiaowei.bao@nxp.com&gt;
Signed-off-by: Hou Zhiqiang &lt;Zhiqiang.Hou@nxp.com&gt;
Signed-off-by: Meenakshi Aggarwal &lt;meenakshi.aggarwal@nxp.com&gt;
Signed-off-by: Vabhav Sharma &lt;vabhav.sharma@nxp.com&gt;
Signed-off-by: Sriram Dash &lt;sriram.dash@nxp.com&gt;
Signed-off-by: Priyanka Jain &lt;priyanka.jain@nxp.com&gt;
Reviewed-by: York Sun &lt;york.sun@nxp.com&gt;
</content>
</entry>
<entry>
<title>drivers/ddr/fsl: fix '__hwconfig without a buffer' messages</title>
<updated>2018-07-26T18:54:00Z</updated>
<author>
<name>Jeremy Gebben</name>
<email>jgebben@sweptlaser.com</email>
</author>
<published>2018-07-20T22:00:36Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=86b840b78d0eba652f65841a870d232ab743612e'/>
<id>urn:sha1:86b840b78d0eba652f65841a870d232ab743612e</id>
<content type='text'>
Pass an empty buffer instead of NULL if the hwconfig environment
variable isn't set.

Signed-off-by: Jeremy Gebben &lt;jgebben@sweptlaser.com&gt;
Cc: Stefano Babic &lt;sbabic@denx.de&gt;
Cc: York Sun &lt;york.sun@nxp.com&gt;
Reviewed-by: York Sun &lt;york.sun@nxp.com&gt;
</content>
</entry>
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