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<title>u-boot.git/drivers/ddr/imx/imx8ulp/Makefile, branch master</title>
<subtitle>Unnamed repository; edit this file 'description' to name the repository.</subtitle>
<id>http://cgit.235523.xyz/u-boot.git/atom/drivers/ddr/imx/imx8ulp/Makefile?h=master</id>
<link rel='self' href='http://cgit.235523.xyz/u-boot.git/atom/drivers/ddr/imx/imx8ulp/Makefile?h=master'/>
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<updated>2024-10-11T17:44:48Z</updated>
<entry>
<title>drivers: Use CONFIG_XPL_BUILD instead of CONFIG_SPL_BUILD</title>
<updated>2024-10-11T17:44:48Z</updated>
<author>
<name>Simon Glass</name>
<email>sjg@chromium.org</email>
</author>
<published>2024-09-30T01:49:48Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=371dc068bbf50c6ed6146c04ec83b644bcc79249'/>
<id>urn:sha1:371dc068bbf50c6ed6146c04ec83b644bcc79249</id>
<content type='text'>
Use the new symbol to refer to any 'SPL' build, including TPL and VPL

Signed-off-by: Simon Glass &lt;sjg@chromium.org&gt;
</content>
</entry>
<entry>
<title>ddr: Add DDR driver for iMX8ULP</title>
<updated>2021-08-09T12:46:51Z</updated>
<author>
<name>Ye Li</name>
<email>ye.li@nxp.com</email>
</author>
<published>2021-08-07T08:01:11Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=7a6577fed4948a8540f1231ce1e6e7c96816d005'/>
<id>urn:sha1:7a6577fed4948a8540f1231ce1e6e7c96816d005</id>
<content type='text'>
Add iMX8ULP DDR initialization driver which loads the DDR timing
parameters and executes the training procedure.

When enabling IMX8ULP_DRAM_PHY_PLL_BYPASS, using PHY PLL bypass mode
to do DDR init

Signed-off-by: Ye Li &lt;ye.li@nxp.com&gt;
</content>
</entry>
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