<feed xmlns='http://www.w3.org/2005/Atom'>
<title>u-boot.git/drivers/ddr/microchip, branch v2016.05</title>
<subtitle>Unnamed repository; edit this file 'description' to name the repository.</subtitle>
<id>http://cgit.235523.xyz/u-boot.git/atom/drivers/ddr/microchip?h=v2016.05</id>
<link rel='self' href='http://cgit.235523.xyz/u-boot.git/atom/drivers/ddr/microchip?h=v2016.05'/>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/'/>
<updated>2016-02-01T21:14:01Z</updated>
<entry>
<title>drivers: ddr: Add DDR2 SDRAM controller driver for Microchip PIC32.</title>
<updated>2016-02-01T21:14:01Z</updated>
<author>
<name>Purna Chandra Mandal</name>
<email>purna.mandal@microchip.com</email>
</author>
<published>2016-01-28T10:00:15Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=9ffa7a35ef940b27813c11f68eb28a6b82696915'/>
<id>urn:sha1:9ffa7a35ef940b27813c11f68eb28a6b82696915</id>
<content type='text'>
This driver initializes PIC32 DDR2 SDRAM controller and internal DDR2 Phy module.
DDR2 controller operates in half-rate mode (upto 533MHZ frequency).

Signed-off-by: Paul Thacker &lt;paul.thacker@microchip.com&gt;
Signed-off-by: Purna Chandra Mandal &lt;purna.mandal@microchip.com&gt;
Reviewed-by: Daniel Schwierzeck &lt;daniel.schwierzeck@gmail.com&gt;
Reviewed-by: Tom Rini &lt;trini@konsulko.com&gt;
Reviewed-by: Simon Glass &lt;sjg@chromium.org&gt;
</content>
</entry>
</feed>
