<feed xmlns='http://www.w3.org/2005/Atom'>
<title>u-boot.git/drivers/ddr, branch master</title>
<subtitle>Unnamed repository; edit this file 'description' to name the repository.</subtitle>
<id>http://cgit.235523.xyz/u-boot.git/atom/drivers/ddr?h=master</id>
<link rel='self' href='http://cgit.235523.xyz/u-boot.git/atom/drivers/ddr?h=master'/>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/'/>
<updated>2026-06-25T21:00:58Z</updated>
<entry>
<title>Kconfig: drivers: restyle remaining</title>
<updated>2026-06-25T21:00:58Z</updated>
<author>
<name>Johan Jonker</name>
<email>jbx6244@gmail.com</email>
</author>
<published>2026-06-10T14:41:21Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=145d58e2c7276f68195a7fc760457a5b88f867dd'/>
<id>urn:sha1:145d58e2c7276f68195a7fc760457a5b88f867dd</id>
<content type='text'>
Restyle all Kconfigs for the rest of "drivers":
Menu entries   : no space left
Menu attributes: 1 TAB
Help text      : 1 TAB + 2 spaces
Replace '---help---' by 'help'

Signed-off-by: Johan Jonker &lt;jbx6244@gmail.com&gt;
[trini: Add missing indentation on a few more multi-paragraph help texts]
Signed-off-by: Tom Rini &lt;trini@konsulko.com&gt;
</content>
</entry>
<entry>
<title>treewide: move bi_dram[] from bd to gd</title>
<updated>2026-06-25T00:13:24Z</updated>
<author>
<name>Ilias Apalodimas</name>
<email>ilias.apalodimas@linaro.org</email>
</author>
<published>2026-06-17T07:48:19Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=1174c99ab421168221be372bd83a4143bf5f167d'/>
<id>urn:sha1:1174c99ab421168221be372bd83a4143bf5f167d</id>
<content type='text'>
Currently, the bi_dram[] information is stored in the board info
structure (bd). Because bd is only valid after reserve_board(),
dram_init_banksize() must be called late in the initialization process.
This limitation is problematic, as it forces us to rely on a variety of
bespoke functions to determine board RAM, bank memory sizes, and other
early setup requirements.

By moving bi_dram[] into the global data (gd), we can run it earlier.
This is particularly convenient since boards define their own
dram_init_banksize() routines, which do not always rely on parsing
Device Tree (DT) memory nodes.

Additionally, U-Boot defaults to relocating to the top of the first memory
bank. While boards currently use custom functions to override this
behavior, having the DRAM bank information available earlier in gd makes
relocating to a different bank trivial and standardizes the process.

Reviewed-by: Anshul Dalal &lt;anshuld@ti.com&gt;
Tested-by: Michal Simek &lt;michal.simek@amd.com&gt; # Versal Gen 2 Vek385
Tested-by: Anshul Dalal &lt;anshuld@ti.com&gt;
Reviewed-by: Simon Glass &lt;sjg@chromium.org&gt;
Signed-off-by: Ilias Apalodimas &lt;ilias.apalodimas@linaro.org&gt;
Tested-by: Christophe Leroy (CS GROUP) &lt;chleroy@kernel.org&gt;
</content>
</entry>
<entry>
<title>treewide: prefer __func__ over __FUNCTION__ and __PRETTY_FUNCTION__</title>
<updated>2026-06-10T20:49:46Z</updated>
<author>
<name>Aristo Chen</name>
<email>aristo.chen@canonical.com</email>
</author>
<published>2026-05-26T01:41:40Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=6c636eabbde7f7915fe37c84395b23c61c66ce64'/>
<id>urn:sha1:6c636eabbde7f7915fe37c84395b23c61c66ce64</id>
<content type='text'>
__FUNCTION__ and __PRETTY_FUNCTION__ are gcc extensions that predate
the C99 __func__ identifier. scripts/checkpatch.pl emits a warning
for any new use of __FUNCTION__ and recommends __func__ instead. In
C (unlike C++) __PRETTY_FUNCTION__ is identical to __func__ because
C function names do not carry signature information, so the
distinction has no behavioural effect here. The majority of the tree
already uses __func__, but a handful of older files in arch/, board/,
boot/, drivers/, examples/ and include/ still carry the gcc spellings
(55 occurrences of __FUNCTION__ across 19 files plus one
__PRETTY_FUNCTION__ in drivers/usb/musb-new/omap2430.c). Convert
them all to the C99 form so the tree is consistent and new patches
in these areas do not have to follow an outdated local style.

Ten "Unnecessary ftrace-like logging - prefer using ftrace" warnings
remain on the printf("%s\n", __func__) and dbg("%s\n", __func__)
function-entry traces in drivers/net/rtl8169.c (behind DEBUG_RTL8169*
preprocessor guards) and drivers/usb/host/ohci-hcd.c. checkpatch
matches the literal "%s\n", __func__ shape regardless of the wrapper,
so silencing those warnings would require changing the debug message
text or removing the traces entirely.

Signed-off-by: Aristo Chen &lt;aristo.chen@canonical.com&gt;
Reviewed-by: Tom Rini &lt;trini@konsulko.com&gt;
</content>
</entry>
<entry>
<title>imx9: Add support for saving DDR training data to NVM</title>
<updated>2026-05-15T20:31:39Z</updated>
<author>
<name>Simona Toaca</name>
<email>simona.toaca@nxp.com</email>
</author>
<published>2026-04-30T08:33:30Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=c9a8f673e0b8dc30bd575faae34e0b1f1e42a706'/>
<id>urn:sha1:c9a8f673e0b8dc30bd575faae34e0b1f1e42a706</id>
<content type='text'>
DDR training data can be saved to NVM and be available
to OEI at boot time, which will trigger QuickBoot flow.

U-Boot only checks for data integrity (CRC32), while
OEI is in charge of authentication when it tries to
load the data from NVM.

On iMX95 A0/A1, 'authentication' is done via another
CRC32. On the other SoCs, authentication is done by
using ELE to check the MAC stored in the ddrphy_qb_state
structure.

Supported platforms: iMX94, iMX95, iMX952 (using OEI)
Supported storage types: eMMC, SD, SPI flash.

Signed-off-by: Viorel Suman &lt;viorel.suman@nxp.com&gt;
Signed-off-by: Ye Li &lt;ye.li@nxp.com&gt;
Signed-off-by: Simona Toaca &lt;simona.toaca@nxp.com&gt;
</content>
</entry>
<entry>
<title>imx8mq: Correct signed_hdmi firmware position</title>
<updated>2026-04-21T23:49:39Z</updated>
<author>
<name>Peng Fan</name>
<email>peng.fan@nxp.com</email>
</author>
<published>2026-04-21T13:41:19Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=5b6dba2924bd8bd9a4c295e5a5eba8dfaf0730b7'/>
<id>urn:sha1:5b6dba2924bd8bd9a4c295e5a5eba8dfaf0730b7</id>
<content type='text'>
signed_hdmi_imx8m.bin is already signed and has a IVT header. It should not
be put in u-boot-spl-mkimage.signed.bin. Move it to head of flash.bin
following NXP imx-mkimage. Keeping it in u-boot-spl-mkimage.signed.bin also
consumes a lot of TCM space which is not expected.

While moving it to head of flash.bin, other changes are required,
u-boot.itb is put at sector 768 per defconfig, so u-boot.itb binman
offset should be updated and it should be moved out from binman section.

Also binman symbol address are updated, so need to subtract u-boot-spl
image_pos + CONFIG_SPL_TEXT_BASE to find the correct location of ddr phy
firmware.

Because there is 1KB padding in HDMI firmware, use 32KB when burning
flash.bin to sd card.

Signed-off-by: Peng Fan &lt;peng.fan@nxp.com&gt;
</content>
</entry>
<entry>
<title>drivers: ddr: imx: Fix Kconfig for SAVED_DRAM_TIMING_BASE</title>
<updated>2026-04-21T23:49:39Z</updated>
<author>
<name>Simona Toaca</name>
<email>simona.toaca@nxp.com</email>
</author>
<published>2026-04-07T07:47:17Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=3814d57597bcf42b8ff758658a2c807fb11115aa'/>
<id>urn:sha1:3814d57597bcf42b8ff758658a2c807fb11115aa</id>
<content type='text'>
The 'default' directive should be before 'help'.

Signed-off-by: Simona Toaca &lt;simona.toaca@nxp.com&gt;
Reviewed-by: Marek Vasut &lt;marek.vasut@mailbox.org&gt;
</content>
</entry>
<entry>
<title>Replace TARGET namespace and cleanup properly</title>
<updated>2026-02-14T17:06:46Z</updated>
<author>
<name>Tien Fong Chee</name>
<email>tien.fong.chee@altera.com</email>
</author>
<published>2026-02-13T12:27:23Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=62f7a94602094617ac384839ed695c2906893a88'/>
<id>urn:sha1:62f7a94602094617ac384839ed695c2906893a88</id>
<content type='text'>
TARGET namespace is for machines / boards / what-have-you that
building U-Boot for. Simply replace from TARGET to ARCH
make things more clear and proper for ALL SoCFPGA.

Signed-off-by: Brian Sune &lt;briansune@gmail.com&gt;
Reviewed-by: Tien Fong Chee &lt;tien.fong.chee@altera.com&gt;

# Conflicts:
#	drivers/ddr/altera/Makefile
</content>
</entry>
<entry>
<title>drivers: ddr: altera: iossm_mailbox: widen MEM_TOTAL_CAPACITY mask</title>
<updated>2026-02-14T17:06:46Z</updated>
<author>
<name>Naresh Kumar Ravulapalli</name>
<email>nareshkumar.ravulapalli@altera.com</email>
</author>
<published>2026-02-09T02:07:09Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=cb23bbf4d7403dbfe1e4b4ef80bca6ae585a181e'/>
<id>urn:sha1:cb23bbf4d7403dbfe1e4b4ef80bca6ae585a181e</id>
<content type='text'>
The previous mask for MEM_TOTAL_CAPACITY_INTF was limited to 8 bits,
which could truncate DDR size values on larger-memory systems.

Update INTF_CAPACITY_GBITS_MASK to 32 bits to correctly represent
the full capacity field according to the hardware specification.

Signed-off-by: Naresh Kumar Ravulapalli &lt;nareshkumar.ravulapalli@altera.com&gt;
Signed-off-by: Chen Huei Lok &lt;chen.huei.lok@altera.com&gt;
Reviewed-by: Tien Fong Chee &lt;tien.fong.chee@altera.com&gt; Best regards,
</content>
</entry>
<entry>
<title>ddr: altera: arria10: Add DRAM size checking</title>
<updated>2026-02-14T17:06:46Z</updated>
<author>
<name>Alif Zakuan Yuslaimi</name>
<email>alif.zakuan.yuslaimi@altera.com</email>
</author>
<published>2025-12-16T08:46:22Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=847e67582b1f0eee85e8f1aa7f5a7a3a41286288'/>
<id>urn:sha1:847e67582b1f0eee85e8f1aa7f5a7a3a41286288</id>
<content type='text'>
Add DRAM size checking compare between size from device tree and actual
hardware.

Trigger hang if DRAM size from device tree is greater than actual hardware.
Display warning message if DRAM size mismatch between device tree and
actual hardware.

Signed-off-by: Alif Zakuan Yuslaimi &lt;alif.zakuan.yuslaimi@altera.com&gt;
Reviewed-by: Tien Fong Chee &lt;tien.fong.chee@altera.com&gt; Best regards,
</content>
</entry>
<entry>
<title>Merge tag 'u-boot-socfpga-next-20250930' of https://source.denx.de/u-boot/custodians/u-boot-socfpga into next</title>
<updated>2025-09-30T22:11:23Z</updated>
<author>
<name>Tom Rini</name>
<email>trini@konsulko.com</email>
</author>
<published>2025-09-30T22:11:23Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=aff68c8514858ddd8d2e508d47bede566511521b'/>
<id>urn:sha1:aff68c8514858ddd8d2e508d47bede566511521b</id>
<content type='text'>
SoCFPGA updates for v2025.10:

CI: https://source.denx.de/u-boot/custodians/u-boot-socfpga/-/pipelines/27762

This pull request brings a set of updates across SoCFPGA platforms
covering Agilex5, Agilex7, N5X, and Stratix10. The changes include:

* Agilex5 enhancements:
  - USB3.1 enablement and DWC3 host driver support
  - System Manager register configuration for USB3
  - Watchdog timeout increase and SDMMC clock API integration
  - dcache handling improvements in SMC mailbox path
  - Enable SPL_SYS_DCACHE_OFF in defconfig

* Clock driver improvements:
  - Introduce dt-bindings header for Agilex clocks
  - Add enable/disable API and EMAC clock selection fixes
  - Replace manual shifts with FIELD_GET usage

* DDR updates:
  - IOSSM mailbox compatibility check
  - Correct DDR calibration status handling

* Device tree changes:
  - Agilex5: disable cache allocation for reads
  - Stratix10: add NAND IP node
  - Enable driver model watchdog
  - Enable USB3.1 node for Agilex5

* Config cleanups:
  - Simplify Agilex7 VAB defconfig
  - Remove obsolete SYS_BOOTM_LEN from N5X VAB config
  - Enable CRC32 support for SoCFPGA
  - Increase USB hub debounce timeout

Overall this set improves reliability of DDR and cache flows,
adds missing USB and MMC features for Agilex5, and refines clock
and configuration handling across platforms.

This patch set has been tested on Agilex 5 devkit, and Agilex devkit.
</content>
</entry>
</feed>
