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<title>u-boot.git/drivers/ddr, branch next</title>
<subtitle>Unnamed repository; edit this file 'description' to name the repository.</subtitle>
<id>http://cgit.235523.xyz/u-boot.git/atom/drivers/ddr?h=next</id>
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<updated>2026-08-19T16:36:04Z</updated>
<entry>
<title>ddr: altera: Use dev_read_addr_index_ptr()</title>
<updated>2026-08-19T16:36:04Z</updated>
<author>
<name>Peng Fan</name>
<email>peng.fan@nxp.com</email>
</author>
<published>2026-05-25T04:10:18Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=2ac36aad4a60d98a1d8f18738a673c82e5184132'/>
<id>urn:sha1:2ac36aad4a60d98a1d8f18738a673c82e5184132</id>
<content type='text'>
Replace devfdt_get_addr_index_ptr() with dev_read_addr_index_ptr() which
supports both live device tree and flat DT backends, avoiding direct
dependency on devfdt_* helpers.

No functional changes.

Signed-off-by: Peng Fan &lt;peng.fan@nxp.com&gt;
</content>
</entry>
<entry>
<title>ddr: altera: Add delay before writing to MBRDADDR register</title>
<updated>2026-08-19T16:36:03Z</updated>
<author>
<name>Alif Zakuan Yuslaimi</name>
<email>alif.zakuan.yuslaimi@altera.com</email>
</author>
<published>2026-02-25T08:42:23Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=6e5aa44ca6ec4cbcef42bbcede4c6e0b7d79ef61'/>
<id>urn:sha1:6e5aa44ca6ec4cbcef42bbcede4c6e0b7d79ef61</id>
<content type='text'>
Add a delay of 1ms before writing the address of the data for HIP
interface into the Responder Mailbox Read Address Register.

The UIBSSM mailbox require some time to settle down while waiting
for the MBRDADATA_VALID bit to become 1 without this delay,
specifically the board will timeout while waiting for
MBRDDATA_VALID bit to 1 after setting to 1.

This 1ms delay has been tested thoroughly and no intermittent issues
with UIBSSM mailbox communication is observed.

Signed-off-by: Alif Zakuan Yuslaimi &lt;alif.zakuan.yuslaimi@altera.com&gt;
Signed-off-by: Boon Khai Ng &lt;boon.khai.ng@altera.com&gt;
</content>
</entry>
<entry>
<title>ddr: altera: arria10: Fix incorrect address for mpu1</title>
<updated>2026-08-19T16:36:03Z</updated>
<author>
<name>Alif Zakuan Yuslaimi</name>
<email>alif.zakuan.yuslaimi@altera.com</email>
</author>
<published>2025-12-16T08:21:57Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=5b47ca5f87f2817de1d3c3f261115a539b112f89'/>
<id>urn:sha1:5b47ca5f87f2817de1d3c3f261115a539b112f89</id>
<content type='text'>
SOCFPGA_SDR_FIREWALL_MPU_FPGA_ADDRESS is already added in
SOCFPGA_SDR_FIREWALL_MPU_FPGA_ADDRESS_OFFSET() macro.

Remove extra SOCFPGA_SDR_FIREWALL_MPU_FPGA_ADDRESS in mpu1 address
computation.

Signed-off-by: Alif Zakuan Yuslaimi &lt;alif.zakuan.yuslaimi@altera.com&gt;
</content>
</entry>
<entry>
<title>ddr: socfpga: Implement ECC DRAM scrubbing support for both Gen5/Arria10</title>
<updated>2026-08-19T16:36:03Z</updated>
<author>
<name>Alif Zakuan Yuslaimi</name>
<email>alif.zakuan.yuslaimi@altera.com</email>
</author>
<published>2026-06-09T02:03:58Z</published>
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<id>urn:sha1:31971b3b0c1978e660d1320927b5af297db048c6</id>
<content type='text'>
Enable ECC scrubbing support for Gen5 by moving sdram_init_ecc_bits() from
sdram_arria10.c to a new common file, sdram_soc32.c which is shared by both
Arria10 and Gen5 devices. This makes ECC scrubbing support no longer
exclusive only to Arria10.

Remove legacy HW watchdog check in favor of current WDT DM for
Gen5/Arria10.

New Kconfig is introduced to enable this implementation only on the default
Arria10 and CycloneV boards as this will increase the SPL size which
will exceed some Gen5 devices' SPL size limit.

Signed-off-by: Tien Fong Chee &lt;tien.fong.chee@altera.com&gt;
Signed-off-by: Alif Zakuan Yuslaimi &lt;alif.zakuan.yuslaimi@altera.com&gt;
</content>
</entry>
<entry>
<title>ddr: altera: gen5: Add DRAM size checking</title>
<updated>2026-08-19T16:36:03Z</updated>
<author>
<name>Alif Zakuan Yuslaimi</name>
<email>alif.zakuan.yuslaimi@altera.com</email>
</author>
<published>2026-06-09T02:03:57Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=a22b000e3c2d1ea09737cac01413fed7650500b6'/>
<id>urn:sha1:a22b000e3c2d1ea09737cac01413fed7650500b6</id>
<content type='text'>
Add DRAM size checking compare between size from device tree and actual
hardware.

Trigger hang if DRAM size from device tree is greater than actual hardware.
Display warning message if DRAM size mismatch between device tree and
actual hardware.

get_ram_size() uses size from device tree. So, it has consistency with
other device families.

New Kconfig is introduced to enable this implementation only on the default
CycloneV board as this will increase the SPL size which will exceed some
Gen5 devices' SPL size limit.

Signed-off-by: Alif Zakuan Yuslaimi &lt;alif.zakuan.yuslaimi@altera.com&gt;
</content>
</entry>
<entry>
<title>ddr: altera: soc64: Add secure region support for ATF flow</title>
<updated>2026-08-19T15:07:05Z</updated>
<author>
<name>Alif Zakuan Yuslaimi</name>
<email>alif.zakuan.yuslaimi@altera.com</email>
</author>
<published>2026-06-05T01:55:00Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=3e1069ae5f25a63a30d100b9a51396ff49fd45e5'/>
<id>urn:sha1:3e1069ae5f25a63a30d100b9a51396ff49fd45e5</id>
<content type='text'>
Setting up firewall regions based on SDRAM memory banks configuration
(up to CONFIG_NR_DRAM_BANKS banks) instead of using whole address space.

First 1 MiB (0 to 0xfffff) of SDRAM is configured as secure region,
other address spaces are non-secure regions. The ARM Trusted Firmware (ATF)
image is located in this first 1 MiB memory region. So, this can prevent
software executing at non-secure state EL0-EL2 and non-secure masters
access to secure region.

Add common function for firewall setup and reuse for all SoC64 devices.

Signed-off-by: Alif Zakuan Yuslaimi &lt;alif.zakuan.yuslaimi@altera.com&gt;
</content>
</entry>
<entry>
<title>arm: socfpga: Move firmware register settings from source code to device tree</title>
<updated>2026-08-19T15:07:04Z</updated>
<author>
<name>Alif Zakuan Yuslaimi</name>
<email>alif.zakuan.yuslaimi@altera.com</email>
</author>
<published>2026-06-05T01:54:57Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=fc2123819e86cacabd972ac0e4b5e33055de44a7'/>
<id>urn:sha1:fc2123819e86cacabd972ac0e4b5e33055de44a7</id>
<content type='text'>
Migrate the CCU, firewall, and high privilege register configurations from
hardcoded values in the source code to the device tree.

L4 per/sys firewall setup which was previously done by firewall_setup() in
spl_s10.c is now replaced by DTreg node in socfpga_soc64_u-boot.dtsi as
Stratix10 is sharing the same tables that Agilex uses.

This helps to centralize hardware configuration, improves maintainability,
and allows easier customization for different platforms.

Signed-off-by: Alif Zakuan Yuslaimi &lt;alif.zakuan.yuslaimi@altera.com&gt;
</content>
</entry>
<entry>
<title>Kconfig: drivers: restyle remaining</title>
<updated>2026-06-25T21:00:58Z</updated>
<author>
<name>Johan Jonker</name>
<email>jbx6244@gmail.com</email>
</author>
<published>2026-06-10T14:41:21Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=145d58e2c7276f68195a7fc760457a5b88f867dd'/>
<id>urn:sha1:145d58e2c7276f68195a7fc760457a5b88f867dd</id>
<content type='text'>
Restyle all Kconfigs for the rest of "drivers":
Menu entries   : no space left
Menu attributes: 1 TAB
Help text      : 1 TAB + 2 spaces
Replace '---help---' by 'help'

Signed-off-by: Johan Jonker &lt;jbx6244@gmail.com&gt;
[trini: Add missing indentation on a few more multi-paragraph help texts]
Signed-off-by: Tom Rini &lt;trini@konsulko.com&gt;
</content>
</entry>
<entry>
<title>treewide: move bi_dram[] from bd to gd</title>
<updated>2026-06-25T00:13:24Z</updated>
<author>
<name>Ilias Apalodimas</name>
<email>ilias.apalodimas@linaro.org</email>
</author>
<published>2026-06-17T07:48:19Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=1174c99ab421168221be372bd83a4143bf5f167d'/>
<id>urn:sha1:1174c99ab421168221be372bd83a4143bf5f167d</id>
<content type='text'>
Currently, the bi_dram[] information is stored in the board info
structure (bd). Because bd is only valid after reserve_board(),
dram_init_banksize() must be called late in the initialization process.
This limitation is problematic, as it forces us to rely on a variety of
bespoke functions to determine board RAM, bank memory sizes, and other
early setup requirements.

By moving bi_dram[] into the global data (gd), we can run it earlier.
This is particularly convenient since boards define their own
dram_init_banksize() routines, which do not always rely on parsing
Device Tree (DT) memory nodes.

Additionally, U-Boot defaults to relocating to the top of the first memory
bank. While boards currently use custom functions to override this
behavior, having the DRAM bank information available earlier in gd makes
relocating to a different bank trivial and standardizes the process.

Reviewed-by: Anshul Dalal &lt;anshuld@ti.com&gt;
Tested-by: Michal Simek &lt;michal.simek@amd.com&gt; # Versal Gen 2 Vek385
Tested-by: Anshul Dalal &lt;anshuld@ti.com&gt;
Reviewed-by: Simon Glass &lt;sjg@chromium.org&gt;
Signed-off-by: Ilias Apalodimas &lt;ilias.apalodimas@linaro.org&gt;
Tested-by: Christophe Leroy (CS GROUP) &lt;chleroy@kernel.org&gt;
</content>
</entry>
<entry>
<title>treewide: prefer __func__ over __FUNCTION__ and __PRETTY_FUNCTION__</title>
<updated>2026-06-10T20:49:46Z</updated>
<author>
<name>Aristo Chen</name>
<email>aristo.chen@canonical.com</email>
</author>
<published>2026-05-26T01:41:40Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=6c636eabbde7f7915fe37c84395b23c61c66ce64'/>
<id>urn:sha1:6c636eabbde7f7915fe37c84395b23c61c66ce64</id>
<content type='text'>
__FUNCTION__ and __PRETTY_FUNCTION__ are gcc extensions that predate
the C99 __func__ identifier. scripts/checkpatch.pl emits a warning
for any new use of __FUNCTION__ and recommends __func__ instead. In
C (unlike C++) __PRETTY_FUNCTION__ is identical to __func__ because
C function names do not carry signature information, so the
distinction has no behavioural effect here. The majority of the tree
already uses __func__, but a handful of older files in arch/, board/,
boot/, drivers/, examples/ and include/ still carry the gcc spellings
(55 occurrences of __FUNCTION__ across 19 files plus one
__PRETTY_FUNCTION__ in drivers/usb/musb-new/omap2430.c). Convert
them all to the C99 form so the tree is consistent and new patches
in these areas do not have to follow an outdated local style.

Ten "Unnecessary ftrace-like logging - prefer using ftrace" warnings
remain on the printf("%s\n", __func__) and dbg("%s\n", __func__)
function-entry traces in drivers/net/rtl8169.c (behind DEBUG_RTL8169*
preprocessor guards) and drivers/usb/host/ohci-hcd.c. checkpatch
matches the literal "%s\n", __func__ shape regardless of the wrapper,
so silencing those warnings would require changing the debug message
text or removing the traces entirely.

Signed-off-by: Aristo Chen &lt;aristo.chen@canonical.com&gt;
Reviewed-by: Tom Rini &lt;trini@konsulko.com&gt;
</content>
</entry>
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