u-boot.git/drivers/ddr, branch v2016.01-rc2

drivers/ddr/fsl: Fix typo in BIST test for DDR4

2015-11-30T17:11:12Z

BIST test code has a typo, resulting the binding registers not maintained as expected. This typo results BIST runs twice on the covered memory. Signed-off-by: York Sun Reported-by: Shengzhou Liu

drivers/ddr/fsl: Enable detection of one DDR controller operation for LSCH3

2015-11-30T17:11:11Z

Freescale LSCH3 platforms use two DDR controlers interleaving mode out of reset. It can be configured to disable one controller. To support this operation, the driver needs to detect and skip the disabled controller. Signed-off-by: York Sun

armv8: ls2085a: Add support of LS2085A SoC

2015-11-30T17:10:47Z

Freescale's LS2085A is a another personality of LS2080A SoC with support of AIOP and DP-DDR. This Patch adds support of LS2085A Personality. Signed-off-by: Pratiyush Mohan Srivastava Signed-off-by: Prabhakar Kushwaha [York Sun: Updated MAINTAINERS files Dropped #ifdef in cpu.h Add CONFIG_SYS_NS16550=y in defconfig] Reviewed-by: York Sun

armv8: LS2080A: Rename LS2085A to reflect LS2080A

2015-11-30T16:53:04Z

LS2080A is a prime personality of Freescale’s LS2085A. It is a non-AIOP personality without support of DP-DDR, L2 switch, 1588, PCIe endpoint etc. So renaming existing LS2085A code base to reflect LS2080A (Prime personality) Signed-off-by: Pratiyush Mohan Srivastava Signed-off-by: Prabhakar Kushwaha [York Sun: Dropped #ifdef in cpu.c for cpu_type_list] Reviewed-by: York Sun

arm: mvebu: Fix SAR1_CPU_CORE_MASK

2015-11-17T22:41:41Z

SAR1_CPU_CORE_MASK was wrong, probably copy/paste from another architecture. Signed-off-by: Dirk Eibach Reviewed-by: Stefan Roese

arm: mvebu: a38x: Remove unsupported topologies

2015-11-17T22:41:41Z

A lot of extra configuration information was left over in the Marvell serdes and DDR3 initialization code for boards that U-boot does not support. Remove this extra config information, and the concept of fixing up board topologies with information loaded from an EEPROM. If this needs to be done, it should be handled in the board file, not in core code. Signed-off-by: Kevin Smith Acked-by: Stefan Roese Cc: Dirk Eibach Cc: Luka Perkov

Various Makefiles: Add SPDX-License-Identifier tags

2015-11-10T14:19:52Z

After consulting with some of the SPDX team, the conclusion is that Makefiles are worth adding SPDX-License-Identifier tags too, and most of ours have one. This adds tags to ones that lack them and converts a few that had full (or in one case, very partial) license blobs into the equivalent tag. Cc: Kate Stewart Signed-off-by: Tom Rini

drivers/ddr/fsl_ddr: Make SR_IE configurable

2015-10-30T16:19:41Z

SR_IE(Self-refresh interrupt enable) is needed for Hardware Based Self-Refresh. Make it configurable and let board code handle the rest. Signed-off-by: Joakim Tjernlund Reviewed-by: York Sun

bitops: introduce BIT() definition

2015-09-11T21:15:32Z

introduce BIT() definition, used in at91_udc gadget driver. Signed-off-by: Heiko Schocher [remove all other occurrences of BIT(x) definition] Signed-off-by: Andreas Bießmann Acked-by: Stefan Roese Acked-by: Anatolij Gustschin

ddr: altera: Repair uninited variable

2015-08-23T09:56:19Z

Fix the following problem: drivers/ddr/altera/sequencer.c: In function 'sdram_calibration_full': drivers/ddr/altera/sequencer.c:1943:25: warning: 'found_failing_read' may be used uninitialized in this function [-Wmaybe-uninitialized] if (found_passing_read && found_failing_read) ^ drivers/ddr/altera/sequencer.c:1803:26: note: 'found_failing_read' was declared here u32 found_passing_read, found_failing_read, initial_failing_dtap; ^ Signed-off-by: Marek Vasut