u-boot.git/drivers/ddr, branch v2018.09

drivers/ddr/fsl: fix '__hwconfig without a buffer' messages

2018-07-26T18:54:00+00:00

Pass an empty buffer instead of NULL if the hwconfig environment
variable isn't set.

Signed-off-by: Jeremy Gebben 
Cc: Stefano Babic 
Cc: York Sun 
Reviewed-by: York Sun

ddr: altera: Add ECC DRAM scrubbing support for Arria10

2018-07-12T07:22:12+00:00

The SDRAM must first be rewritten by zeroes if ECC is used to initialize
the ECC metadata. Make the CPU overwrite the DRAM with zeroes in such a
case. This scrubbing implementation turns the caches on temporarily, then
overwrites the whole RAM with zeroes, flushes the caches and turns them
off again. This provides satisfactory performance.

Signed-off-by: Marek Vasut 
Cc: Chin Liang See 
Cc: Dinh Nguyen

ddr: altera: Drop custom dram_bank_mmu_setup() on Arria10

2018-07-12T07:22:12+00:00

This function was never used in SPL and the default implementation of
dram_bank_mmu_setup() does the same thing. The only difference is the
part which configures OCRAM as cachable, which doesn't really work as
it covers more than the OCRAM.

Signed-off-by: Marek Vasut 
Cc: Chin Liang See 
Cc: Dinh Nguyen

ddr: altera: stratix10: Add DDR support for Stratix10 SoC

2018-07-12T07:22:12+00:00

Add DDR support for Stratix SoC

Signed-off-by: Chin Liang See 
Signed-off-by: Ley Foon Tan

SPDX: Fixup SPDX tags in a few new files

2018-05-20T13:47:45+00:00

Signed-off-by: Tom Rini

configs: Add DDR Kconfig support for Arria 10

2018-05-18T08:30:47+00:00

This patch enables DDR Kconfig support for Arria 10.

Signed-off-by: Tien Fong Chee 
Reviewed-by: Dinh Nguyen

ARM: socfpga: Add DDR driver for Arria 10

2018-05-18T08:30:47+00:00

Add DDR driver support for Arria 10.

Signed-off-by: Tien Fong Chee

ARM: socfpga: Rename the gen5 sdram driver to more specific name

2018-05-18T08:30:47+00:00

Current sdram driver is only applied to gen5 device, hence it is better
to rename sdram driver to more specific name which is related to gen5
device.

Signed-off-by: Tien Fong Chee

ARM: mvebu: a38x: Add missing SPDX license identfier

2018-05-15T13:08:00+00:00

mv_ddr_build_message.c is generated in Marvell's standalone mv_ddr code.
When imported into u-boot we need to add the appropriate SPDX tag and
re-format it slightly.

Signed-off-by: Chris Packham

ARM: mvebu: a38x: use non-zero size for ddr scrubbing

2018-05-14T08:01:56+00:00

Make ddr3_calc_mem_cs_size() global scope and use it in
ddr3_new_tip_ecc_scrub to correctly initialize all of DDR memory.

Signed-off-by: Chris Packham 
Signed-off-by: Stefan Roese