u-boot.git/drivers/ddr, branch v2022.01 Unnamed repository; edit this file 'description' to name the repository. drivers: ddr: lc_common_dimm_params.c : Fix Divison by zero issue 2021-11-09T11:48:23+00:00 Maninder Singh maninder.singh_1@nxp.com 2021-10-10T16:12:16+00:00 38ce95a1c6fdc7a2a8cc177202cd421beef56427 Adds check for memory clock variable before calculating caslat_actual. Set mclk_ps to slowest DIMM supported if mclk_ps is found zero. Signed-off-by: Maninder Singh <maninder.singh_1@nxp.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com> 
Adds check for memory clock variable before calculating caslat_actual.

Set mclk_ps to slowest DIMM supported if mclk_ps is found zero.

Signed-off-by: Maninder Singh <maninder.singh_1@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
drivers: ddr: main.c: Fix Bad Shift operator issue 2021-11-09T09:13:24+00:00 Priyanka Singh priyanka.singh@nxp.com 2021-08-19T06:09:03+00:00 71b255b6575b8e859ffddc880cce3c7606c7abca Fix Bad Shift operator issue in step_to_string function by adding an if check Signed-off-by: Priyanka Singh <priyanka.singh@nxp.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com> 
Fix Bad Shift operator issue in step_to_string function
by adding an if check

Signed-off-by: Priyanka Singh <priyanka.singh@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
drivers: ddr: fsl_ddr_gen4.c: Fix divide by zero issue 2021-11-09T09:13:24+00:00 Priyanka Singh priyanka.singh@nxp.com 2021-08-19T06:09:02+00:00 f5a37b02b0830f984518f2348ad6f3784516f130 Fix possible divide by zero issue in fsl_ddr_set_memctl_regs by adding an if check Signed-off-by: Priyanka Singh <priyanka.singh@nxp.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com> 
Fix possible divide by zero issue in fsl_ddr_set_memctl_regs
by adding an if check

Signed-off-by: Priyanka Singh <priyanka.singh@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
drivers: ddr: util.c: Fix divide by zero issue 2021-11-09T09:13:24+00:00 Priyanka Singh priyanka.singh@nxp.com 2021-08-19T06:09:01+00:00 a1932ece70e1441b169650d475d7814920a94c27 Fix possible divide by zero issue in get_memory_clk_period_ps by adding a check Signed-off-by: Priyanka Singh <priyanka.singh@nxp.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com> 
Fix possible divide by zero issue in get_memory_clk_period_ps
by adding a check

Signed-off-by: Priyanka Singh <priyanka.singh@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
WS cleanup: remove SPACE(s) followed by TAB 2021-09-30T13:08:16+00:00 Wolfgang Denk wd@denx.de 2021-09-27T15:42:39+00:00 0cf207ec01cbacae47585fcc26591dd2296507d6 Signed-off-by: Wolfgang Denk <wd@denx.de> 
Signed-off-by: Wolfgang Denk <wd@denx.de>
WS cleanup: remove trailing empty lines 2021-09-30T12:08:56+00:00 Wolfgang Denk wd@denx.de 2021-09-27T15:42:36+00:00 66356b4c06c934021f6cb58d93877427162b369f Signed-off-by: Wolfgang Denk <wd@denx.de> 
Signed-off-by: Wolfgang Denk <wd@denx.de>
Merge tag 'v2021.10-rc5' into next 2021-09-27T13:45:36+00:00 Tom Rini trini@konsulko.com 2021-09-27T13:45:36+00:00 e908d20fcbd847e17345591fc171b59d9a156516 Prepare v2021.10-rc5 
Prepare v2021.10-rc5
ddr: altera: use KBUILD_BASENAME instead of __FILE__ 2021-09-22T19:31:05+00:00 Marek Vasut marex@denx.de 2021-09-14T03:20:19+00:00 532010da67329a1c3dbe92a167486df6e61d4f4a The KBUILD_BASENAME contains just the name of the compiled module, in this case 'sequencer', rather than a full path to the compiled file. Use it to prevent pulling the full path into the U-Boot binary, which is useless and annoying. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Siew Chin Lim <elly.siew.chin.lim@intel.com> Cc: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> Cc: Tien Fong Chee <tien.fong.chee@intel.com> 
The KBUILD_BASENAME contains just the name of the compiled module,
in this case 'sequencer', rather than a full path to the compiled
file. Use it to prevent pulling the full path into the U-Boot binary,
which is useless and annoying.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Siew Chin Lim <elly.siew.chin.lim@intel.com>
Cc: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
Cc: Tien Fong Chee <tien.fong.chee@intel.com>
nxp: Migrate a number of DDR related symbols to Kconfig 2021-08-31T21:46:37+00:00 Tom Rini trini@konsulko.com 2021-08-21T17:50:18+00:00 95372165aec94fa0984f30ca33c3691fe2aabdcd - Guard most of the options in drivers/ddr/fsl/Kconfig with SYS_FSL_DDR || SYS_FSL_MMDC. - Migrate FSL_DMA, DDR_ECC, DDR_ECC_CMD, and ECC_INIT_VIA_DDRCONTROLLER to Kconfig. - Clean up the logic for including the DDR_ECC_CMD code. Signed-off-by: Tom Rini <trini@konsulko.com> 
- Guard most of the options in drivers/ddr/fsl/Kconfig with
  SYS_FSL_DDR || SYS_FSL_MMDC.
- Migrate FSL_DMA, DDR_ECC, DDR_ECC_CMD, and ECC_INIT_VIA_DDRCONTROLLER
  to Kconfig.
- Clean up the logic for including the DDR_ECC_CMD code.

Signed-off-by: Tom Rini <trini@konsulko.com>
nxp: Migrate CONFIG_DDR_CLK_FREQ to Kconfig 2021-08-31T21:46:37+00:00 Tom Rini trini@konsulko.com 2021-08-21T17:50:17+00:00 efb5dab7ba8a9a6f89e44c4e60b0adb768c77e84 As this symbol can either be a fixed value or the function get_board_ddr_clk, migration is tricky. Introduce a choice of DYNAMIC or STATIC_DDR_CLK_FREQ. If DYNAMIC, we continue to use the board defined get_board_ddr_clk function. If STATIC, set CONFIG_DDR_CLK_FREQ to that value and now include/clock_legacy.h contains the function prototype or defines get_board_ddr_clk() to that static value. Update callers to test for DYNAMIC or STATIC. Signed-off-by: Tom Rini <trini@konsulko.com> 
As this symbol can either be a fixed value or the function
get_board_ddr_clk, migration is tricky.  Introduce a choice of DYNAMIC
or STATIC_DDR_CLK_FREQ.  If DYNAMIC, we continue to use the board
defined get_board_ddr_clk function.  If STATIC, set CONFIG_DDR_CLK_FREQ
to that value and now include/clock_legacy.h contains the function
prototype or defines get_board_ddr_clk() to that static value.  Update
callers to test for DYNAMIC or STATIC.

Signed-off-by: Tom Rini <trini@konsulko.com>