u-boot.git/drivers/ddr, branch v2022.07

ddr: altera: soc64: Integer fix overflow that caused DDR size mismatched

2022-06-17T08:27:05+00:00

Convert the constant integer to 'phys_size_t' to avoid overflow
when calculating the SDRAM size.

Signed-off-by: Dinesh Maniyam 
Reviewed-by: Tien Fong Chee

ddr: altera: Stratix10: Use phys_size_t for memory size

2022-06-16T08:10:58+00:00

Replace with phys_size_t for all memory size variables declaration
for the sake of scalability. phys_size_t is defined in
/arch/arm/include/asm/types.h.

Signed-off-by: Tien Fong Chee

ddr: altera: Ignore bit[7-4] for both seq2core & core2seq handshake in HPS

2022-06-16T08:10:44+00:00

Bit[7-4] for both register seq2core and core2seq handshake in HPS are not
required for triggering DDR re-calibration or resetting EMIF. So, ignoring
these bits just for playing it safe.

Signed-off-by: Tien Fong Chee

intel: n5x: ddr: update license

2022-06-15T09:48:22+00:00

All the source code of sdram_n5x.c are from Intel, update the license to
use both GPL2.0 and BSD-3 Clause because this copy of code may used for
open source and internal project.

Signed-off-by: Tien Fong Chee

imx8m: fix reading of DDR4 MR registers

2022-05-20T07:30:28+00:00

I was trying to employ lpddr4_mr_read() to something similar to what
the imx8mm-cl-iot-gate board is doing for auto-detecting the RAM
type. However, the version in drivers/ddr/imx/imx8m/ddrphy_utils.c
differs from the private one used by that board in how it extracts the
byte value, and I was only getting zeroes. Adding a bit of debug
printf'ing gives me

 tmp = 0x00ffff00
 tmp = 0x00070700
 tmp = 0x00000000
 tmp = 0x00101000

and indeed I was expecting a (combined) value of 0xff070010 (0xff
being Manufacturer ID for Micron). I can't find any documentation that
says how the values are supposed to be read, but clearly the iot-gate
definition is the right one, both for its use case as well as my
imx8mp-based board.

So lift the private definition of lpddr4_mr_read() from the
imx8mm-cl-iot-gate board code to ddrphy_utils.c, and add a declaration
in the ddr.h header where e.g. get_trained_CDD() is already declared.

This has only been compile-tested for the imx8mm-cl-iot-gate
board (since I don't have the hardware), but since I've merely moved
its definition of lpddr4_mr_read(), I'd be surprised if it changed
anything for that board.

Signed-off-by: Rasmus Villemoes 
Tested-by: Ying-Chun Liu (PaulLiu) 
Reviewed-by: Fabio Estevam

ddr: fsl: Allow to compile it without env support

2022-04-26T11:48:39+00:00

When env support is disabled then usage of env_get_f() generates linker
errors. So do not compile env_get_f() when env support is disabled (for
example when disabled only in SPL).

Signed-off-by: Pali Rohár 
Reviewed-by: Priyanka Jain

imx8m: ddrphy_utils: Add 3732 MT/s mode

2022-04-12T13:36:17+00:00

Add entry for 3732 MT/s mode of operation of the LPDDR4, in
which case the DDR PLL has to be configured in 933 MHz mode.

Signed-off-by: Marek Vasut 
Cc: Fabio Estevam 
Cc: Peng Fan 
Cc: Stefano Babic 
Reviewed-by: Fabio Estevam

Convert CONFIG_DIMM_SLOTS_PER_CTLR to Kconfig

2022-04-08T14:46:22+00:00

This converts the following to Kconfig:
   CONFIG_DIMM_SLOTS_PER_CTLR

Signed-off-by: Tom Rini

db-mv784mp-gp: Rename CONFIG_DB_784MP_GP to CONFIG_TARGET_DB_MV784MP_GP

2022-04-01T14:28:47+00:00

The value CONFIG_DB_784MP_GP is only used in the DDR code to refer to
CONFIG_TARGET_DB_MV784MP_GP so just use that second value directly.

Cc: Stefan Roese 
Signed-off-by: Tom Rini 
Reviewed-by: Stefan Roese

Convert CONFIG_CHIP_SELECTS_PER_CTRL to Kconfig

2022-03-03T21:51:20+00:00

This converts the following to Kconfig:
   CONFIG_CHIP_SELECTS_PER_CTRL

Cc: Alison Wang 
Cc: Pramod Kumar 
Cc: Priyanka Jain 
Cc: Rajesh Bhagat 
Cc: Vladimir Oltean 
Signed-off-by: Tom Rini