u-boot.git/drivers/ddr, branch v2025.04

imx: Use per board ddrphy_trained_csr

2024-12-23T11:10:15Z

Drop global ddrphy_trained_csr which maybe different with per board ddrphy_trained_csr. DDR TOOL generates ddrphy_trained_csr for each board, using the global ddrphy_trained_csr has risk that values may be not up to date. Signed-off-by: Peng Fan

ddr: imx: Add new rates for i.MX91

2024-12-07T12:07:04Z

iMX91 reuses iMX93 controller and PHY, but with lower speed, so add new DDR rates for i.MX91. Signed-off-by: Ye Li Reviewed-by: Peng Fan Signed-off-by: Peng Fan

imx: Support i.MX93 9X9 QSB board

2024-10-25T12:07:16Z

Add i.MX93 9x9 Quick Start Board support. - Two ddr scripts included w/o inline ecc feature. - SDHC/NETWORK/I2C/UART supported - PCA9450 supported, default over drive mode - Documentation added. Signed-off-by: Peng Fan

ddr: altera: include u-boot/schedule.h

2024-10-23T04:52:38Z

These TUs currently rely on getting a declaration of schedule() through some nested include. Include the proper header directly. Signed-off-by: Rasmus Villemoes Reviewed-by: Simon Glass Reviewed-by: Stefan Roese

global: Rename SPL_ to XPL_

2024-10-11T17:44:48Z

Use XPL_ as the symbol to indicate an SPL build. This means that SPL_ is no-longer set. Signed-off-by: Simon Glass

drivers: Use CONFIG_XPL_BUILD instead of CONFIG_SPL_BUILD

2024-10-11T17:44:48Z

Use the new symbol to refer to any 'SPL' build, including TPL and VPL Signed-off-by: Simon Glass

imx9: Add 233Mhz DDR PLL frequency

2024-09-19T03:12:41Z

To support 1.866GTS LPDDR4x timing script, need to add 233Mhz freq to DDR PLL for second mission point at 933MTS. Otherwise DDR training will fail. Reviewed-by: Peng Fan Signed-off-by: Ye Li Signed-off-by: Peng Fan

fsl: mxc: Drop legacy I2c

2024-08-13T04:12:48Z

Drop some old code from the mxc_i2c and ddr/fsl drivers. This will allow removal of very old common I2C code. Signed-off-by: Simon Glass Reviewed-by: Heiko Schocher

drivers: ddr: Remove duplicate newlines

2024-07-22T16:53:05Z

Drop all duplicate newlines. No functional change. Signed-off-by: Marek Vasut

arm: mvebu: a38x: Add optional support for using old DDR3 training code

2024-07-08T06:20:58Z

Add optional support for using old DDR3 training code from 2017. The code lives in drivers/ddr/marvell/a38x/old/. To prevent symbol clashing with new DDR3 training code, a special header which renames all clashing symbols via macros is included and the symbols are prefixed with 'old_'. If old DDR3 training support is selected for a board, then the SPL initialization code calls a new function board_use_old_ddr3_training() to check whether it should use old DDR3 training code. The default weak implementation returns false, defaulting to new DDR3 training code. Boards that wish to support this need to select the ARMADA_38X_SUPPORT_OLD_DDR3_TRAINING config option and implement the old version of DDR topology provider, ddr3_get_topology_map(). Signed-off-by: Marek Behún