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<title>u-boot.git/drivers/dma/ti, branch v2022.01</title>
<subtitle>Unnamed repository; edit this file 'description' to name the repository.</subtitle>
<id>http://cgit.235523.xyz/u-boot.git/atom/drivers/dma/ti?h=v2022.01</id>
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<updated>2021-08-31T21:47:49Z</updated>
<entry>
<title>Kconfig: Remove all default n/no options</title>
<updated>2021-08-31T21:47:49Z</updated>
<author>
<name>Michal Simek</name>
<email>michal.simek@xilinx.com</email>
</author>
<published>2021-08-27T06:48:10Z</published>
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<id>urn:sha1:b4c2c151b14b59a2403675526adf666710cade67</id>
<content type='text'>
default n/no doesn't need to be specified. It is default option anyway.

Signed-off-by: Michal Simek &lt;michal.simek@xilinx.com&gt;
[trini: Rework FSP_USE_UPD portion]
Signed-off-by: Tom Rini &lt;trini@konsulko.com&gt;
</content>
</entry>
<entry>
<title>dma: ti: k3-udma: Add support for native configuration of chan/flow</title>
<updated>2021-06-11T13:48:52Z</updated>
<author>
<name>Vignesh Raghavendra</name>
<email>vigneshr@ti.com</email>
</author>
<published>2021-06-07T14:17:53Z</published>
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<id>urn:sha1:5abb694d6016eaf497c3d9a3ec79382e217e7508</id>
<content type='text'>
In absence of Device Manager (DM) services such as at R5 SPL stage,
driver will have to natively setup TCHAN/RCHAN/RFLOW cfg registers.
Add support for the same.

Note that we still need to send chan/flow cfg message to TIFS via TISCI
client driver in order to open up firewalls around chan/flow but setting
up of cfg registers is handled locally.

U-Boot specific code is in a separate file included in main driver so
as to maintain similarity with kernel driver in order to ease porting of
code in future.

Signed-off-by: Vignesh Raghavendra &lt;vigneshr@ti.com&gt;
Signed-off-by: Lokesh Vutla &lt;lokeshvutla@ti.com&gt;
Link: https://lore.kernel.org/r/20210607141753.28796-8-vigneshr@ti.com
</content>
</entry>
<entry>
<title>dma: ti: k3-udma: Add BCDMA and PKTDMA support</title>
<updated>2021-05-12T11:06:38Z</updated>
<author>
<name>Vignesh Raghavendra</name>
<email>vigneshr@ti.com</email>
</author>
<published>2021-05-10T14:36:08Z</published>
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<id>urn:sha1:9a92851c33e87bbf00e2cb11f16067b87032ed98</id>
<content type='text'>
Sync BCDMA and PKTDMA support from Kernel for AM64 SoC

Signed-off-by: Vignesh Raghavendra &lt;vigneshr@ti.com&gt;
</content>
</entry>
<entry>
<title>dma: ti: k3-psil-am64: Add AM64 PSIL endpoint data</title>
<updated>2021-05-12T11:06:38Z</updated>
<author>
<name>Vignesh Raghavendra</name>
<email>vigneshr@ti.com</email>
</author>
<published>2021-05-10T14:36:07Z</published>
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<id>urn:sha1:6f617d86185b85cdfb3cb8b9ef629b5b22f69789</id>
<content type='text'>
Add AM64 SoC specific channel mapping and endpoint data.

Signed-off-by: Vignesh Raghavendra &lt;vigneshr@ti.com&gt;
</content>
</entry>
<entry>
<title>dma: ti: k3-psil: Extend PSIL EP data extension for AM64</title>
<updated>2021-05-12T11:06:38Z</updated>
<author>
<name>Vignesh Raghavendra</name>
<email>vigneshr@ti.com</email>
</author>
<published>2021-05-10T14:36:06Z</published>
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<id>urn:sha1:b00030e26731675e523d46ec75a81a1aa19b274c</id>
<content type='text'>
Extend PSIL EP data to include AM64 DMA specific information

Signed-off-by: Vignesh Raghavendra &lt;vigneshr@ti.com&gt;
</content>
</entry>
<entry>
<title>dma: ti: k3-psil-am654: Drop unused PSIL EP static data</title>
<updated>2021-05-12T11:06:38Z</updated>
<author>
<name>Vignesh Raghavendra</name>
<email>vigneshr@ti.com</email>
</author>
<published>2021-05-10T14:36:05Z</published>
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<id>urn:sha1:035c679a7719e30c574948ee90ac641a58622221</id>
<content type='text'>
ICSSG Ethernet driver uses two src threads per port (one per slice).
Similarly CPSW uses one src thread.

Drop PSIL EP static data for other src threads in order to reduce
R5 SPL footprint. This makes AM65x board bootable again.

Signed-off-by: Vignesh Raghavendra &lt;vigneshr@ti.com&gt;
</content>
</entry>
<entry>
<title>dm: treewide: Rename auto_alloc_size members to be shorter</title>
<updated>2020-12-13T15:00:25Z</updated>
<author>
<name>Simon Glass</name>
<email>sjg@chromium.org</email>
</author>
<published>2020-12-03T23:55:17Z</published>
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<id>urn:sha1:41575d8e4c334df148c4cdd7c40cc825dc0fcaa1</id>
<content type='text'>
This construct is quite long-winded. In earlier days it made some sense
since auto-allocation was a strange concept. But with driver model now
used pretty universally, we can shorten this to 'auto'. This reduces
verbosity and makes it easier to read.

Coincidentally it also ensures that every declaration is on one line,
thus making dtoc's job easier.

Signed-off-by: Simon Glass &lt;sjg@chromium.org&gt;
</content>
</entry>
<entry>
<title>dma: ti: k3-udma: Reset the channel during release</title>
<updated>2020-10-12T02:39:18Z</updated>
<author>
<name>Vignesh Raghavendra</name>
<email>vigneshr@ti.com</email>
</author>
<published>2020-09-17T14:41:22Z</published>
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<id>urn:sha1:85bdcf03b79bb35b98fce26d8dd064cc1165917a</id>
<content type='text'>
Reset the channel completely during channel release in order to clear
teardown bit before handing over to next user or jumping to Linux.

Signed-off-by: Vignesh Raghavendra &lt;vigneshr@ti.com&gt;
Reviewed-by: Grygorii Strashko &lt;grygorii.strashko@ti.com&gt;
</content>
</entry>
<entry>
<title>dma: ti: k3-udma: Switch to k3_ringacc_request_rings_pair</title>
<updated>2020-07-13T15:28:34Z</updated>
<author>
<name>Vignesh Raghavendra</name>
<email>vigneshr@ti.com</email>
</author>
<published>2020-07-06T07:56:27Z</published>
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<id>urn:sha1:ddcf5318af45a90d60be96e16b3653de5fa26965</id>
<content type='text'>
We only request ring pairs via K3 DMA driver, switch to use the new
k3_ringacc_request_rings_pair() to simplify the code.

As a good side effect, all boot stages now use exposed RING mode which
avoid maintaining proxy mode for 32 bit R5 core.

Signed-off-by: Vignesh Raghavendra &lt;vigneshr@ti.com&gt;
</content>
</entry>
<entry>
<title>dma: ti: k3-udma: Move RX descriptor ring entries to rflow struct</title>
<updated>2020-07-13T15:28:34Z</updated>
<author>
<name>Vignesh Raghavendra</name>
<email>vigneshr@ti.com</email>
</author>
<published>2020-07-06T07:56:26Z</published>
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<id>urn:sha1:7be5121719c3e7384591c3c7f9e21f034031064c</id>
<content type='text'>
In K3 UDMA architecture, RX rings are associated with RX flows rather
than RX channels, therefore move the ring pointers to udma_rflow struct

Signed-off-by: Vignesh Raghavendra &lt;vigneshr@ti.com&gt;
</content>
</entry>
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