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<title>u-boot.git/drivers/dma, branch v2023.04</title>
<subtitle>Unnamed repository; edit this file 'description' to name the repository.
</subtitle>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/'/>
<entry>
<title>dma: ti: k3-udma: Fix channel hang on teardown</title>
<updated>2023-03-22T16:51:15+00:00</updated>
<author>
<name>Vignesh Raghavendra</name>
<email>vigneshr@ti.com</email>
</author>
<published>2023-03-08T04:12:57+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=f8461352b84ea66ad03d3231a5056643ab73515d'/>
<id>f8461352b84ea66ad03d3231a5056643ab73515d</id>
<content type='text'>
Setting RX flow error handling will stall the channel until descriptors
are available to move RX data. Setting this bit causes issues when
tearing down ethernet DMA channel at the end of TFTP transfer as
unrelated network packets can cause teardown to stall indefinitely waiting
for driver to queue add more desc leading to channel hang with error
logs:
udma_stop_dev2mem TIMEOUT !
udma_stop_dev2mem: peer not stopped TIMEOUT !
udma_stop_dev2mem TIMEOUT !

Fix this by clearing rx_error_handling similar to how its done for UDMA
as part of udma_alloc_rchan_sci_req()

This fixes occasional TFTP Failures seen when downloading multiple files
one after the other on AM64/AM62 SoCs.

Fixes: 9a92851c33e8 ("dma: ti: k3-udma: Add BCDMA and PKTDMA support")
Reported-by: Nishanth Menon &lt;nm@ti.com&gt;
Signed-off-by: Vignesh Raghavendra &lt;vigneshr@ti.com&gt;
</content>
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<pre>
Setting RX flow error handling will stall the channel until descriptors
are available to move RX data. Setting this bit causes issues when
tearing down ethernet DMA channel at the end of TFTP transfer as
unrelated network packets can cause teardown to stall indefinitely waiting
for driver to queue add more desc leading to channel hang with error
logs:
udma_stop_dev2mem TIMEOUT !
udma_stop_dev2mem: peer not stopped TIMEOUT !
udma_stop_dev2mem TIMEOUT !

Fix this by clearing rx_error_handling similar to how its done for UDMA
as part of udma_alloc_rchan_sci_req()

This fixes occasional TFTP Failures seen when downloading multiple files
one after the other on AM64/AM62 SoCs.

Fixes: 9a92851c33e8 ("dma: ti: k3-udma: Add BCDMA and PKTDMA support")
Reported-by: Nishanth Menon &lt;nm@ti.com&gt;
Signed-off-by: Vignesh Raghavendra &lt;vigneshr@ti.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>ddr: fsl: Remove CONFIG_MEM_INIT_VALUE</title>
<updated>2022-12-22T15:31:48+00:00</updated>
<author>
<name>Tom Rini</name>
<email>trini@konsulko.com</email>
</author>
<published>2022-12-02T21:42:35+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=829e9d223657f5779668bb7a46e902a85e09b664'/>
<id>829e9d223657f5779668bb7a46e902a85e09b664</id>
<content type='text'>
The way all of the memory init code here works is that we pass
0xDEADBEEF around for the initial value (as it's a well known 'poison'
value and so easily recognized in debuggers, etc). The only point of
this CONFIG symbol was to pass in a different value for that purpose.
Drop this symbol and cleanup the code slightly.

Signed-off-by: Tom Rini &lt;trini@konsulko.com&gt;
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<pre>
The way all of the memory init code here works is that we pass
0xDEADBEEF around for the initial value (as it's a well known 'poison'
value and so easily recognized in debuggers, etc). The only point of
this CONFIG symbol was to pass in a different value for that purpose.
Drop this symbol and cleanup the code slightly.

Signed-off-by: Tom Rini &lt;trini@konsulko.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>global: Migrate CONFIG_SYS_MPC8* symbols to the CFG_SYS namespace</title>
<updated>2022-11-10T15:08:55+00:00</updated>
<author>
<name>Tom Rini</name>
<email>trini@konsulko.com</email>
</author>
<published>2022-10-29T00:27:12+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=5155207ae1a0797a99c0a5f4e99741960ff04697'/>
<id>5155207ae1a0797a99c0a5f4e99741960ff04697</id>
<content type='text'>
Migrate all of COFIG_SYS_MPC* to the CFG_SYS namespace.

Signed-off-by: Tom Rini &lt;trini@konsulko.com&gt;
</content>
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<pre>
Migrate all of COFIG_SYS_MPC* to the CFG_SYS namespace.

Signed-off-by: Tom Rini &lt;trini@konsulko.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>dm: treewide: Do not use the return value of simple uclass iterator</title>
<updated>2022-10-29T13:36:33+00:00</updated>
<author>
<name>Michal Suchanek</name>
<email>msuchanek@suse.de</email>
</author>
<published>2022-10-12T19:58:08+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=4954937d922840c212b7eba297cc2d4779f087ad'/>
<id>4954937d922840c212b7eba297cc2d4779f087ad</id>
<content type='text'>
uclass_first_device/uclass_next_device return value will be removed,
don't use it.

With the current implementation dev is equivalent to !ret. It is
redundant to check both, ret check can be replaced with dev check, and
ret check inside the iteration is dead code.

Signed-off-by: Michal Suchanek &lt;msuchanek@suse.de&gt;
Reviewed-by: Simon Glass &lt;sjg@chromium.org&gt;
</content>
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<pre>
uclass_first_device/uclass_next_device return value will be removed,
don't use it.

With the current implementation dev is equivalent to !ret. It is
redundant to check both, ret check can be replaced with dev check, and
ret check inside the iteration is dead code.

Signed-off-by: Michal Suchanek &lt;msuchanek@suse.de&gt;
Reviewed-by: Simon Glass &lt;sjg@chromium.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>dma: Transfer dma_ops should use DMA address types</title>
<updated>2022-10-18T17:40:40+00:00</updated>
<author>
<name>Andrew Davis</name>
<email>afd@ti.com</email>
</author>
<published>2022-10-07T17:11:13+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=b9add6413d2bcbec281d1a1edeec5c729a576a1b'/>
<id>b9add6413d2bcbec281d1a1edeec5c729a576a1b</id>
<content type='text'>
DMA operations should function on DMA addresses, not virtual addresses.
Although these are usually the same in U-Boot, it is more correct
to be explicit with our types here.

Signed-off-by: Andrew Davis &lt;afd@ti.com&gt;
</content>
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<pre>
DMA operations should function on DMA addresses, not virtual addresses.
Although these are usually the same in U-Boot, it is more correct
to be explicit with our types here.

Signed-off-by: Andrew Davis &lt;afd@ti.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>dma: ti-edma3: Add DMA map operations before and after transfers</title>
<updated>2022-10-18T17:40:40+00:00</updated>
<author>
<name>Andrew Davis</name>
<email>afd@ti.com</email>
</author>
<published>2022-10-07T17:11:12+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=b8392650462094ed15e123f836daccd7617946a5'/>
<id>b8392650462094ed15e123f836daccd7617946a5</id>
<content type='text'>
We should clean the caches before any DMA operation and clean+invalidate
after. This matches what the DMA framework does for us already but adds
it to the two functions here in this driver that don't yet go through the
new DMA framework.

Signed-off-by: Andrew Davis &lt;afd@ti.com&gt;
</content>
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<pre>
We should clean the caches before any DMA operation and clean+invalidate
after. This matches what the DMA framework does for us already but adds
it to the two functions here in this driver that don't yet go through the
new DMA framework.

Signed-off-by: Andrew Davis &lt;afd@ti.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>dma: Use dma-mapping for cache ops and sync after write</title>
<updated>2022-10-18T17:40:40+00:00</updated>
<author>
<name>Andrew Davis</name>
<email>afd@ti.com</email>
</author>
<published>2022-10-07T17:11:11+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=c8d2fc75171465e19c8583a1ef266b3a7fe49281'/>
<id>c8d2fc75171465e19c8583a1ef266b3a7fe49281</id>
<content type='text'>
The DMA'd memory area needs cleaned and invalidated after the DMA
write so that any stale cache lines do not mask new data.

Signed-off-by: Andrew Davis &lt;afd@ti.com&gt;
</content>
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<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
The DMA'd memory area needs cleaned and invalidated after the DMA
write so that any stale cache lines do not mask new data.

Signed-off-by: Andrew Davis &lt;afd@ti.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>dma: ti: k3-udma: Fix 'SZ_64K’ undeclared error</title>
<updated>2022-10-07T01:05:17+00:00</updated>
<author>
<name>Dhruva Gole</name>
<email>d-gole@ti.com</email>
</author>
<published>2022-09-20T05:26:02+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=742f302cdc9198dc27deeea8c1c35482cf616ec2'/>
<id>742f302cdc9198dc27deeea8c1c35482cf616ec2</id>
<content type='text'>
Include linux/sizes.h because it defines SZ_64K which is used in many
places inside k3-udma.c
This fixes the error: ‘SZ_64K’ undeclared which appears during build
time

Signed-off-by: Dhruva Gole &lt;d-gole@ti.com&gt;
Reviewed-by: Tom Rini &lt;trini@konsulko.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Include linux/sizes.h because it defines SZ_64K which is used in many
places inside k3-udma.c
This fixes the error: ‘SZ_64K’ undeclared which appears during build
time

Signed-off-by: Dhruva Gole &lt;d-gole@ti.com&gt;
Reviewed-by: Tom Rini &lt;trini@konsulko.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>arm: mach-k3: Rename SOC_K3_AM6 to SOC_K3_AM654</title>
<updated>2022-07-25T17:02:04+00:00</updated>
<author>
<name>Andrew Davis</name>
<email>afd@ti.com</email>
</author>
<published>2022-07-15T15:25:27+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=80b93bb71cfff8b0ba9bbb5704231216f7518998'/>
<id>80b93bb71cfff8b0ba9bbb5704231216f7518998</id>
<content type='text'>
The first AM6x device was the AM654x, but being the first we named it
just AM6, since more devices have come out with this same prefix we
should switch it to the normal convention of using the full name of the
first compatibility device the series. This makes what device we are
talking about more clear and matches all the K3 devices added since.

Signed-off-by: Andrew Davis &lt;afd@ti.com&gt;
Reviewed-by: Tom Rini &lt;trini@konsulko.com&gt;
</content>
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<pre>
The first AM6x device was the AM654x, but being the first we named it
just AM6, since more devices have come out with this same prefix we
should switch it to the normal convention of using the full name of the
first compatibility device the series. This makes what device we are
talking about more clear and matches all the K3 devices added since.

Signed-off-by: Andrew Davis &lt;afd@ti.com&gt;
Reviewed-by: Tom Rini &lt;trini@konsulko.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>dma: ti: Add PSIL data for AM62x DMASS</title>
<updated>2022-06-10T17:37:32+00:00</updated>
<author>
<name>Vignesh Raghavendra</name>
<email>vigneshr@ti.com</email>
</author>
<published>2022-05-25T08:08:44+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=720d37ff27583d10c30c6f5dcaadb0dfedde8964'/>
<id>720d37ff27583d10c30c6f5dcaadb0dfedde8964</id>
<content type='text'>
Add PSIL data for AM62x SoC.

Signed-off-by: Vignesh Raghavendra &lt;vigneshr@ti.com&gt;
</content>
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<pre>
Add PSIL data for AM62x SoC.

Signed-off-by: Vignesh Raghavendra &lt;vigneshr@ti.com&gt;
</pre>
</div>
</content>
</entry>
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