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<title>u-boot.git/drivers/firmware, branch v2022.04</title>
<subtitle>Unnamed repository; edit this file 'description' to name the repository.
</subtitle>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/'/>
<entry>
<title>Merge tag 'xilinx-for-v2022.04-rc3' of https://gitlab.denx.de/u-boot/custodians/u-boot-microblaze</title>
<updated>2022-02-21T13:32:02+00:00</updated>
<author>
<name>Tom Rini</name>
<email>trini@konsulko.com</email>
</author>
<published>2022-02-21T13:32:02+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=24b628a8f844868adca897aae40af6f98cdbc26d'/>
<id>24b628a8f844868adca897aae40af6f98cdbc26d</id>
<content type='text'>
Xilinx changes for v2022.04-rc3

microblaze:
- Fix exception handler

zynqmp:
- Show information about secure images
- DT changes (som u-boot file removal)
- Fix zynqmp_pm_cfg_obj_convert.py
- Fix platform boot

xilinx:
- Fix bootm_size calculation
- Remove GPIO_EXTRA_HEADER selection

power:
- Add zynqmp power management driver

scsi:
- Add phy support to ceva driver

zynq qspi:
- Fix unaligned accesses and check baudrate setup
- Add support for spi memory operations

net:
- Fix 64bit calculation in axi_emac

video:
- Add missing gpio dependency for seps driver
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<pre>
Xilinx changes for v2022.04-rc3

microblaze:
- Fix exception handler

zynqmp:
- Show information about secure images
- DT changes (som u-boot file removal)
- Fix zynqmp_pm_cfg_obj_convert.py
- Fix platform boot

xilinx:
- Fix bootm_size calculation
- Remove GPIO_EXTRA_HEADER selection

power:
- Add zynqmp power management driver

scsi:
- Add phy support to ceva driver

zynq qspi:
- Fix unaligned accesses and check baudrate setup
- Add support for spi memory operations

net:
- Fix 64bit calculation in axi_emac

video:
- Add missing gpio dependency for seps driver
</pre>
</div>
</content>
</entry>
<entry>
<title>arm64: zynqmp: Add command for disabling loading other overlays</title>
<updated>2022-02-15T12:04:03+00:00</updated>
<author>
<name>Michal Simek</name>
<email>michal.simek@xilinx.com</email>
</author>
<published>2022-01-14T12:25:38+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=fac46bc446e0ca2e5bd8fa4d28f243ee4a1d8995'/>
<id>fac46bc446e0ca2e5bd8fa4d28f243ee4a1d8995</id>
<content type='text'>
Add command "zynqmp pmufw node close" to disable permission to load
additional pmufw config overlays. This command will make sure that any
other sw will ask for changing permission.

Signed-off-by: Michal Simek &lt;michal.simek@xilinx.com&gt;
Link: https://lore.kernel.org/r/cfa5cc7909eb8deb23eb0f11c26954cbaddeb861.1642163135.git.michal.simek@xilinx.com
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<pre>
Add command "zynqmp pmufw node close" to disable permission to load
additional pmufw config overlays. This command will make sure that any
other sw will ask for changing permission.

Signed-off-by: Michal Simek &lt;michal.simek@xilinx.com&gt;
Link: https://lore.kernel.org/r/cfa5cc7909eb8deb23eb0f11c26954cbaddeb861.1642163135.git.michal.simek@xilinx.com
</pre>
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</content>
</entry>
<entry>
<title>xilinx: firmware: Introduce zynqmp_pmufw_node() for loading PMU fragments</title>
<updated>2022-02-15T12:03:54+00:00</updated>
<author>
<name>Michal Simek</name>
<email>michal.simek@xilinx.com</email>
</author>
<published>2022-01-14T12:25:35+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=c750c6dbb29535efa01464d46afc6ccf999cf7c5'/>
<id>c750c6dbb29535efa01464d46afc6ccf999cf7c5</id>
<content type='text'>
Introduce zynqmp_pmufw_node() for loading PMU configuration fragment for
enabling IPs. Firmware driver has small overlay where NODE id is added and
config fragment is sent to PMUFW. There is a need to build PMUFW with
fragment support.

Signed-off-by: Michal Simek &lt;michal.simek@xilinx.com&gt;
Link: https://lore.kernel.org/r/636e8150bd4e2b1f988d59795772c685ceeec083.1642163135.git.michal.simek@xilinx.com
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<pre>
Introduce zynqmp_pmufw_node() for loading PMU configuration fragment for
enabling IPs. Firmware driver has small overlay where NODE id is added and
config fragment is sent to PMUFW. There is a need to build PMUFW with
fragment support.

Signed-off-by: Michal Simek &lt;michal.simek@xilinx.com&gt;
Link: https://lore.kernel.org/r/636e8150bd4e2b1f988d59795772c685ceeec083.1642163135.git.michal.simek@xilinx.com
</pre>
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</content>
</entry>
<entry>
<title>power: zynqmp: Add power domain driver for ZynqMP</title>
<updated>2022-02-15T12:01:42+00:00</updated>
<author>
<name>Michal Simek</name>
<email>michal.simek@xilinx.com</email>
</author>
<published>2022-02-07T09:27:37+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=e0283cbdfd49a437ef3cfdd662b196d2f70b5ea0'/>
<id>e0283cbdfd49a437ef3cfdd662b196d2f70b5ea0</id>
<content type='text'>
Driver should be enabled by CONFIG_POWER_DOMAIN=y and
CONFIG_ZYNQMP_POWER_DOMAIN=y. Power domain driver doesn't have own DT node
but it uses zynqmp firmware DT node that's why there is a need to bind
driver when firmware node is found.

Driver itself is simple. It is sending pmufw config object overlay for
enabling access to device which is done in ...domain_request().
In ...domain_on() capabilities are passed and node is requested.
This should be bare minimum of required to get power domain driver working.

Signed-off-by: Michal Simek &lt;michal.simek@xilinx.com&gt;
Reviewed-by: Jaehoon Chung &lt;jh80.chung@samsung.com&gt;
Link: https://lore.kernel.org/r/f4b9433b91c0b18c375b061c7a4e29d428f70547.1644226055.git.michal.simek@xilinx.com
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<pre>
Driver should be enabled by CONFIG_POWER_DOMAIN=y and
CONFIG_ZYNQMP_POWER_DOMAIN=y. Power domain driver doesn't have own DT node
but it uses zynqmp firmware DT node that's why there is a need to bind
driver when firmware node is found.

Driver itself is simple. It is sending pmufw config object overlay for
enabling access to device which is done in ...domain_request().
In ...domain_on() capabilities are passed and node is requested.
This should be bare minimum of required to get power domain driver working.

Signed-off-by: Michal Simek &lt;michal.simek@xilinx.com&gt;
Reviewed-by: Jaehoon Chung &lt;jh80.chung@samsung.com&gt;
Link: https://lore.kernel.org/r/f4b9433b91c0b18c375b061c7a4e29d428f70547.1644226055.git.michal.simek@xilinx.com
</pre>
</div>
</content>
</entry>
<entry>
<title>drivers: dma: Add support for J721S2</title>
<updated>2022-02-08T14:41:27+00:00</updated>
<author>
<name>David Huang</name>
<email>d-huang@ti.com</email>
</author>
<published>2022-01-25T15:26:32+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=e00b1ac8c6301a7fce194f8a0213d8ea7b7006a6'/>
<id>e00b1ac8c6301a7fce194f8a0213d8ea7b7006a6</id>
<content type='text'>
Add support for DMA in J721S2 SoC.

Signed-off-by: David Huang &lt;d-huang@ti.com&gt;
Signed-off-by: Aswath Govindraju &lt;a-govindraju@ti.com&gt;
</content>
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<pre>
Add support for DMA in J721S2 SoC.

Signed-off-by: David Huang &lt;d-huang@ti.com&gt;
Signed-off-by: Aswath Govindraju &lt;a-govindraju@ti.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>Merge tag 'xilinx-for-v2022.04-rc1' of https://source.denx.de/u-boot/custodians/u-boot-microblaze</title>
<updated>2022-01-19T16:43:44+00:00</updated>
<author>
<name>Tom Rini</name>
<email>trini@konsulko.com</email>
</author>
<published>2022-01-19T16:43:44+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=068415eadefbbc81f14d4ce61fcf7a7eb39650d4'/>
<id>068415eadefbbc81f14d4ce61fcf7a7eb39650d4</id>
<content type='text'>
Xilinx changes for v2022.04-rc1

gpio:
- Add modepin driver

net:
- Save random mac addresses to eth variable

zynqmp gem:
- Add support for mdio bus DT description
- Add support for reset and SGMII phy configuration
- Reduce timeout for MDIO accesses

zynqmp clk:
- Fix clock handling for gem and usb

phy:
- Add zynqmp phy/serdes driver

serial:
- Add one missing compatible string

microblaze:
- Symbol alignement
- SPL fixups
- Code cleanups

zynqmp:
- Various dt changes, DP pre-reloc, gem resets, gem clocks
- Switch SOM to shared psu configuration
- Move dcache handling to firmware driver
- Workaround gmii2rgmii DT description issue
- Enable broadcasts again
- Change firmware enablement logic
- Small adjustement in firmware driver

versal:
- Support new mmc@ DT nodes
- Fix run time variable handling
- Add missing I2C_PMC ID for power domain
</content>
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<pre>
Xilinx changes for v2022.04-rc1

gpio:
- Add modepin driver

net:
- Save random mac addresses to eth variable

zynqmp gem:
- Add support for mdio bus DT description
- Add support for reset and SGMII phy configuration
- Reduce timeout for MDIO accesses

zynqmp clk:
- Fix clock handling for gem and usb

phy:
- Add zynqmp phy/serdes driver

serial:
- Add one missing compatible string

microblaze:
- Symbol alignement
- SPL fixups
- Code cleanups

zynqmp:
- Various dt changes, DP pre-reloc, gem resets, gem clocks
- Switch SOM to shared psu configuration
- Move dcache handling to firmware driver
- Workaround gmii2rgmii DT description issue
- Enable broadcasts again
- Change firmware enablement logic
- Small adjustement in firmware driver

versal:
- Support new mmc@ DT nodes
- Fix run time variable handling
- Add missing I2C_PMC ID for power domain
</pre>
</div>
</content>
</entry>
<entry>
<title>firmware: zynqmp: Do not report error if node is already configured</title>
<updated>2022-01-19T14:14:29+00:00</updated>
<author>
<name>Michal Simek</name>
<email>michal.simek@xilinx.com</email>
</author>
<published>2022-01-14T12:25:37+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=11c07719d58d4627e21fc59f5ab58f85edd5c024'/>
<id>11c07719d58d4627e21fc59f5ab58f85edd5c024</id>
<content type='text'>
Power domain driver sends PM fragment to PMUFW. It is sent for every node
which is listed in DT. But some nodes could be already enabled but driver
is not capable to find it out. That's why it blinly sents request for every
listed IP. When PMUFW response by XST_PM_ALREADY_CONFIGURED error code
there is no need to show any error message because node is already enabled.
That's why cover this case with message when DEBUG is enabled.

Signed-off-by: Michal Simek &lt;michal.simek@xilinx.com&gt;
Link: https://lore.kernel.org/r/8c15ef0b68cf191f693d3d010f70ac24cfd8171f.1642163135.git.michal.simek@xilinx.com
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<pre>
Power domain driver sends PM fragment to PMUFW. It is sent for every node
which is listed in DT. But some nodes could be already enabled but driver
is not capable to find it out. That's why it blinly sents request for every
listed IP. When PMUFW response by XST_PM_ALREADY_CONFIGURED error code
there is no need to show any error message because node is already enabled.
That's why cover this case with message when DEBUG is enabled.

Signed-off-by: Michal Simek &lt;michal.simek@xilinx.com&gt;
Link: https://lore.kernel.org/r/8c15ef0b68cf191f693d3d010f70ac24cfd8171f.1642163135.git.michal.simek@xilinx.com
</pre>
</div>
</content>
</entry>
<entry>
<title>firmware: zynqmp: Move loading message to debug</title>
<updated>2022-01-19T14:14:29+00:00</updated>
<author>
<name>Michal Simek</name>
<email>michal.simek@xilinx.com</email>
</author>
<published>2022-01-14T12:25:36+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=12662e7034b4b6e070830e074f1cfab139dd21d6'/>
<id>12662e7034b4b6e070830e074f1cfab139dd21d6</id>
<content type='text'>
Power domain driver is using this function for every IP which is PD listed.
This can end up with a lot of messages which end up in boot log. That's why
show it only in EL3 as was used in past.

Signed-off-by: Michal Simek &lt;michal.simek@xilinx.com&gt;
Link: https://lore.kernel.org/r/d73fc8bc663110b6e8d5e70fdb6435d1199e9db8.1642163135.git.michal.simek@xilinx.com
</content>
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<pre>
Power domain driver is using this function for every IP which is PD listed.
This can end up with a lot of messages which end up in boot log. That's why
show it only in EL3 as was used in past.

Signed-off-by: Michal Simek &lt;michal.simek@xilinx.com&gt;
Link: https://lore.kernel.org/r/d73fc8bc663110b6e8d5e70fdb6435d1199e9db8.1642163135.git.michal.simek@xilinx.com
</pre>
</div>
</content>
</entry>
<entry>
<title>xilinx: firmware: Move dcache handling directly to pmufw load config</title>
<updated>2022-01-05T09:22:02+00:00</updated>
<author>
<name>Michal Simek</name>
<email>michal.simek@xilinx.com</email>
</author>
<published>2021-11-18T12:00:02+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=380bd08370b363a4bfe76e70fbbaead10541445b'/>
<id>380bd08370b363a4bfe76e70fbbaead10541445b</id>
<content type='text'>
Core function should make sure that data is stored properly that's why move
cache operations directly to zynqmp_pmufw_load_config_object() to be able
to call it from other functions.

Signed-off-by: Michal Simek &lt;michal.simek@xilinx.com&gt;
Link: https://lore.kernel.org/r/8c92edd3650ce34a3cfd1c1e4e9103980830b1fa.1637236800.git.michal.simek@xilinx.com
</content>
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<pre>
Core function should make sure that data is stored properly that's why move
cache operations directly to zynqmp_pmufw_load_config_object() to be able
to call it from other functions.

Signed-off-by: Michal Simek &lt;michal.simek@xilinx.com&gt;
Link: https://lore.kernel.org/r/8c92edd3650ce34a3cfd1c1e4e9103980830b1fa.1637236800.git.michal.simek@xilinx.com
</pre>
</div>
</content>
</entry>
<entry>
<title>Merge tag 'v2022.01-rc3' into next</title>
<updated>2021-11-29T17:00:57+00:00</updated>
<author>
<name>Tom Rini</name>
<email>trini@konsulko.com</email>
</author>
<published>2021-11-29T17:00:57+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=2402c93130c09b881f9cc1369459fb49d9fa0f74'/>
<id>2402c93130c09b881f9cc1369459fb49d9fa0f74</id>
<content type='text'>
Prepare v2022.01-rc3

Signed-off-by: Tom Rini &lt;trini@konsulko.com&gt;
</content>
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<pre>
Prepare v2022.01-rc3

Signed-off-by: Tom Rini &lt;trini@konsulko.com&gt;
</pre>
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</content>
</entry>
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