u-boot.git/drivers/firmware, branch v2026.01 Unnamed repository; edit this file 'description' to name the repository. firmware: scmi: Add clock v3.2 CONFIG_SET support 2025-11-10T12:57:42+00:00 Vinh Nguyen vinh.nguyen.xz@renesas.com 2025-11-05T03:42:26+00:00 0619cb32030b1d78379f3181d3e1103bb86124fb SCMI v3.2 introduces a new clock CONFIG_SET message format that can optionally carry also OEM specific configuration values beside the usual clock enable/disable requests. Add support to use such new format when talking to a v3.2 compliant SCMI platform. Support existing enable/disable operations across different clock protocol versions: this patch still does not add protocol operations to support the new OEM specific optional configuration capabilities. No functional change for the SCMI drivers users of the related enable and disable clock operations. [Marek: Remodel after Linux e49e314a2cf7 ("firmware: arm_scmi: Add clock v3.2 CONFIG_SET support") Support both old < 2.1 and new >= 2.1 protocol versions. Update commit message based on Linux one] Signed-off-by: Vinh Nguyen <vinh.nguyen.xz@renesas.com> Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org> Reviewed-by: Alice Guo <alice.guo@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com> 
SCMI v3.2 introduces a new clock CONFIG_SET message format that can
optionally carry also OEM specific configuration values beside the usual
clock enable/disable requests. Add support to use such new format when
talking to a v3.2 compliant SCMI platform.

Support existing enable/disable operations across different clock protocol
versions: this patch still does not add protocol operations to support the
new OEM specific optional configuration capabilities.

No functional change for the SCMI drivers users of the related enable and
disable clock operations.

[Marek: Remodel after Linux e49e314a2cf7 ("firmware: arm_scmi: Add clock v3.2 CONFIG_SET support")
        Support both old < 2.1 and new >= 2.1 protocol versions.
	Update commit message based on Linux one]

Signed-off-by: Vinh Nguyen <vinh.nguyen.xz@renesas.com>
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Reviewed-by: Alice Guo <alice.guo@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
firmware: scmi: Drop mmu_set_region_dcache_behaviour() misuse 2025-11-10T12:57:42+00:00 Marek Vasut marek.vasut+renesas@mailbox.org 2025-10-25T21:35:09+00:00 a5a0134570c88cd49a6fc97256764cb7fbb93dff MMU region cache behavior configuration for SCMI/SMT mailboxes is platform specific. Even on ARM systems, the mailbox memory may not even be located in any cacheable MMU region and may instead reside in some SRAM. Remove this non-generic cache behavior configuration code from generic code path. It is unlikely that any platform is affected by this change if it did configure its MMU regions correctly on start up. Platforms which might be affected are i.MX94/95 and STM32MP. Fixes: 240720e9052f ("firmware: scmi: mailbox/smt agent device") Fixes: 2a3f161c8b16 ("scmi: correctly configure MMU for SCMI buffer") Fixes: b2ae10970d40 ("firmware: scmi: use PAGE_SIZE alignment for ARM64") Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org> Tested-by: Alice Guo <alice.guo@nxp.com> Tested-by: Patrice Chotard <patrice.chotard@foss.st.com> Signed-off-by: Peng Fan <peng.fan@nxp.com> 
MMU region cache behavior configuration for SCMI/SMT mailboxes is
platform specific. Even on ARM systems, the mailbox memory may not
even be located in any cacheable MMU region and may instead reside
in some SRAM. Remove this non-generic cache behavior configuration
code from generic code path.

It is unlikely that any platform is affected by this change if it
did configure its MMU regions correctly on start up. Platforms
which might be affected are i.MX94/95 and STM32MP.

Fixes: 240720e9052f ("firmware: scmi: mailbox/smt agent device")
Fixes: 2a3f161c8b16 ("scmi: correctly configure MMU for SCMI buffer")
Fixes: b2ae10970d40 ("firmware: scmi: use PAGE_SIZE alignment for ARM64")
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Tested-by: Alice Guo <alice.guo@nxp.com>
Tested-by: Patrice Chotard <patrice.chotard@foss.st.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
firmware: scmi: Add i.MX95 SCMI CPU Protocol 2025-10-24T19:47:50+00:00 Peng Fan peng.fan@nxp.com 2025-10-17T09:32:34+00:00 ac9b02dd1028d14b6326970c93dfc3c50daa16f1 This protocol allows an agent to start, stop a CPU or set reset vector. It is used to manage auxiliary CPUs in an LM (e.g. additional cores in an AP cluster). Signed-off-by: Peng Fan <peng.fan@nxp.com> Reviewed-by: Alice Guo <alice.guo@nxp.com> 
This protocol allows an agent to start, stop a CPU or set reset vector.
It is used to manage auxiliary CPUs in an LM (e.g. additional cores in an
AP cluster).

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Alice Guo <alice.guo@nxp.com>
firmware: scmi: Add i.MX95 SCMI LMM protocol driver 2025-10-24T19:47:50+00:00 Peng Fan peng.fan@nxp.com 2025-10-17T09:32:33+00:00 3f20ea3675c466ab16761c9b280e6c382bae02c3 Add Logical Machine Management(LMM) protocol which is intended for boot, shutdown, and reset of other logical machines (LM). It is usually used to allow one LM to manager another used as an offload or accelerator engine. Following Linux Kernel, created a separate folder for holding vendor protocol drivers. Signed-off-by: Peng Fan <peng.fan@nxp.com> Reviewed-by: Alice Guo <alice.guo@nxp.com> 
Add Logical Machine Management(LMM) protocol which is intended for boot,
shutdown, and reset of other logical machines (LM). It is usually used to
allow one LM to manager another used as an offload or accelerator engine.

Following Linux Kernel, created a separate folder for holding vendor
protocol drivers.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Alice Guo <alice.guo@nxp.com>
firmware: scmi: Support probe vendor ID 0x80 and 0x82 2025-10-24T19:47:50+00:00 Peng Fan peng.fan@nxp.com 2025-10-17T09:32:32+00:00 7830ccc77a13dd2a9880a942734bb5687416c4d8 Preparing to add i.MX LMM and CPU protocol driver, support probe SCMI vendor ID 0x80(i.MX SCMI LMM ID) and 0x82(i.MX SCMI CPU ID). And use Kconfig option to support conditional compilation. Signed-off-by: Peng Fan <peng.fan@nxp.com> Reviewed-by: Alice Guo <alice.guo@nxp.com> 
Preparing to add i.MX LMM and CPU protocol driver, support probe SCMI
vendor ID 0x80(i.MX SCMI LMM ID) and 0x82(i.MX SCMI CPU ID). And use
Kconfig option to support conditional compilation.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Alice Guo <alice.guo@nxp.com>
firmware: scmi: Conditionally compile protocol support 2025-10-24T19:47:50+00:00 Peng Fan peng.fan@nxp.com 2025-10-17T09:32:30+00:00 251dd6bf0e89a587710fa7bfa320088617f8854e Add conditional compilation for SCMI protocol support in scmi_get_protocol() and scmi_add_protocol() based on corresponding Kconfig options. This ensures that only the enabled protocols are compiled and accessed, and reducing binary size. Signed-off-by: Peng Fan <peng.fan@nxp.com> Reviewed-by: Alice Guo <alice.guo@nxp.com> 
Add conditional compilation for SCMI protocol support in scmi_get_protocol()
and scmi_add_protocol() based on corresponding Kconfig options. This ensures
that only the enabled protocols are compiled and accessed, and reducing binary
size.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Alice Guo <alice.guo@nxp.com>
ti_sci: Pointer is never assigned to valid value 2025-10-16T21:02:14+00:00 Andrew Goodbody andrew.goodbody@linaro.org 2025-10-08T09:23:37+00:00 5b9125746dfde0a29911ccd542801da6b8f94239 The pointer resp is declared but never assigned a value but is then dereferenced. Fix this by assigning the pointer to the message buffer. This issue was found by Smatch. Reviewed-by: Udit Kumar <u-kumar1@ti.com> Signed-off-by: Andrew Goodbody <andrew.goodbody@linaro.org> Reviewed-by: Nishanth Menon <nm@ti.com> Tested-by: Anshul Dalal <anshuld@ti.com> 
The pointer resp is declared but never assigned a value but is then
dereferenced. Fix this by assigning the pointer to the message buffer.

This issue was found by Smatch.

Reviewed-by: Udit Kumar <u-kumar1@ti.com>
Signed-off-by: Andrew Goodbody <andrew.goodbody@linaro.org>
Reviewed-by: Nishanth Menon <nm@ti.com>
Tested-by: Anshul Dalal <anshuld@ti.com>
ti_sci: Provide error code on error exit 2025-10-16T21:02:14+00:00 Andrew Goodbody andrew.goodbody@linaro.org 2025-10-08T09:23:36+00:00 4602fa92202388665ddfbb622f001d62b1473a08 In ti_sci_get_response the check for message sequence will return ret on a fail but ret will be 0 at that point. Instead return -EINVAL. Also change dev_dbg call to dev_err to be consistent with other error detection code in the same function. This issue was found by Smatch. Reviewed-by: Udit Kumar <u-kumar1@ti.com> Signed-off-by: Andrew Goodbody <andrew.goodbody@linaro.org> Reviewed-by: Nishanth Menon <nm@ti.com> Tested-by: Anshul Dalal <anshuld@ti.com> 
In ti_sci_get_response the check for message sequence will return ret
on a fail but ret will be 0 at that point. Instead return -EINVAL.
Also change dev_dbg call to dev_err to be consistent with other error
detection code in the same function.

This issue was found by Smatch.

Reviewed-by: Udit Kumar <u-kumar1@ti.com>
Signed-off-by: Andrew Goodbody <andrew.goodbody@linaro.org>
Reviewed-by: Nishanth Menon <nm@ti.com>
Tested-by: Anshul Dalal <anshuld@ti.com>
ti_sci: Prevent memory leak 2025-10-16T21:02:14+00:00 Andrew Goodbody andrew.goodbody@linaro.org 2025-10-08T09:23:35+00:00 4b8bc5af80f1637cd71a1b6a0dffa7588a03f27c temp is assigned the pointer returned by malloc which is used without a NULL check and then never freed. Add a NULL check and ensure temp is freed on all return paths. This issue was found by Smatch. Reviewed-by: Udit Kumar <u-kumar1@ti.com> Signed-off-by: Andrew Goodbody <andrew.goodbody@linaro.org> Reviewed-by: Nishanth Menon <nm@ti.com> Tested-by: Anshul Dalal <anshuld@ti.com> 
temp is assigned the pointer returned by malloc which is used without a
NULL check and then never freed. Add a NULL check and ensure temp is
freed on all return paths.

This issue was found by Smatch.

Reviewed-by: Udit Kumar <u-kumar1@ti.com>
Signed-off-by: Andrew Goodbody <andrew.goodbody@linaro.org>
Reviewed-by: Nishanth Menon <nm@ti.com>
Tested-by: Anshul Dalal <anshuld@ti.com>
Merge tag 'xilinx-for-v2026.01-rc1-v2' of https://source.denx.de/u-boot/custodians/u-boot-microblaze 2025-10-14T15:48:02+00:00 Tom Rini trini@konsulko.com 2025-10-14T15:48:02+00:00 b1cc9a53d7ba8b85e77980417242420889273e86 AMD/Xilinx/FPGA changes for v2026.01-rc1 v2 zynqmp: - DT updates - Enable new commands mbv: - Simplify defconfigs clk: - Separate legacy handler and use SMC handler misc: - Tighten TTC Kconfig dependency net: - Add 10GBE support to Gem pwm: - cadence-ttc: Fix array sizes fwu: - Add platform hook support spi: - Remove undocumented cdns,is-dma property video: - Fix DPSUB RGB handling 
AMD/Xilinx/FPGA changes for v2026.01-rc1 v2

zynqmp:
- DT updates
- Enable new commands

mbv:
- Simplify defconfigs

clk:
- Separate legacy handler and use SMC handler

misc:
- Tighten TTC Kconfig dependency

net:
- Add 10GBE support to Gem

pwm:
- cadence-ttc: Fix array sizes

fwu:
- Add platform hook support

spi:
- Remove undocumented cdns,is-dma property

video:
- Fix DPSUB RGB handling