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<title>u-boot.git/drivers/fpga/Makefile, branch v2017.09</title>
<subtitle>Unnamed repository; edit this file 'description' to name the repository.</subtitle>
<id>http://cgit.235523.xyz/u-boot.git/atom/drivers/fpga/Makefile?h=v2017.09</id>
<link rel='self' href='http://cgit.235523.xyz/u-boot.git/atom/drivers/fpga/Makefile?h=v2017.09'/>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/'/>
<updated>2017-07-26T08:31:44Z</updated>
<entry>
<title>arm: socfpga: Add FPGA driver support for Arria 10</title>
<updated>2017-07-26T08:31:44Z</updated>
<author>
<name>Tien Fong Chee</name>
<email>tien.fong.chee@intel.com</email>
</author>
<published>2017-07-26T05:05:43Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=2baa997240d3e20fb4f97e5b32cbfc0e188df926'/>
<id>urn:sha1:2baa997240d3e20fb4f97e5b32cbfc0e188df926</id>
<content type='text'>
Add FPGA driver support for Arria 10.

Signed-off-by: Tien Fong Chee &lt;tien.fong.chee@intel.com&gt;
Reviewed-by: Ley Foon Tan &lt;ley.foon.tan@intel.com&gt;
Reviewed-by: Dinh Nguyen &lt;dinguyen@kernel.org&gt;
</content>
</entry>
<entry>
<title>arm: socfpga: Restructure FPGA driver in the preparation to support A10</title>
<updated>2017-07-26T08:31:44Z</updated>
<author>
<name>Tien Fong Chee</name>
<email>tien.fong.chee@intel.com</email>
</author>
<published>2017-07-26T05:05:38Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=6867e19a439264c80354cdd297f68fa22a98c632'/>
<id>urn:sha1:6867e19a439264c80354cdd297f68fa22a98c632</id>
<content type='text'>
Move FPGA driver which is Gen5 specific code into Gen5 driver file
and keeping common FPGA driver intact. All the changes are still keeping
in driver/fpga/ and no functional change. Subsequent patch would move
FPGA manager driver from arch/arm into driver/fpga/.

Signed-off-by: Tien Fong Chee &lt;tien.fong.chee@intel.com&gt;
Reviewed-by: Ley Foon Tan &lt;ley.foon.tan@intel.com&gt;
Reviewed-by: Dinh Nguyen &lt;dinguyen@kernel.org&gt;
</content>
</entry>
<entry>
<title>fpga: xilinx: zynqmp: Add PL bitstream download support for ZynqMP</title>
<updated>2016-09-22T05:33:21Z</updated>
<author>
<name>Siva Durga Prasad Paladugu</name>
<email>siva.durga.paladugu@xilinx.com</email>
</author>
<published>2016-01-13T10:55:37Z</published>
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<id>urn:sha1:6b2450143882987f4287ea78783866c5f9ac4aff</id>
<content type='text'>
Add PL bitstream dowload support for ZynqMP
Bitstream will be validated by uboot and loaded
to PL by invoking an smc instruction to ATF which route this request to
PMU FW which will take care of loading it to PL

Signed-off-by: Siva Durga Prasad Paladugu &lt;sivadur@xilinx.com&gt;
Signed-off-by: Michal Simek &lt;michal.simek@xilinx.com&gt;
</content>
</entry>
<entry>
<title>fpga: altera: Add StratixV support</title>
<updated>2016-03-24T08:47:43Z</updated>
<author>
<name>Stefan Roese</name>
<email>sr@denx.de</email>
</author>
<published>2016-02-12T12:48:02Z</published>
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<id>urn:sha1:ff9c4c535a8b722c54d45e77aa083fa08552341d</id>
<content type='text'>
This patch adds support for programming of the StratixV FPGAs. Programming
is done in this case (board theadorable) via SPI. The board may provide
board specific code for bitstream programming.

This StratixV support will be used by the theadorable board.

Signed-off-by: Stefan Roese &lt;sr@denx.de&gt;
Cc: Tom Rini &lt;trini@konsulko.com&gt;
Signed-off-by: Stefan Roese &lt;sr@denx.de&gt;
</content>
</entry>
<entry>
<title>arm: socfpga: fpga: Add SoCFPGA FPGA programming interface</title>
<updated>2014-10-06T15:46:50Z</updated>
<author>
<name>Pavel Machek</name>
<email>pavel@denx.de</email>
</author>
<published>2014-09-08T12:08:45Z</published>
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<id>urn:sha1:230fe9b202ff0ca396ad9a564816cc87d42daa6e</id>
<content type='text'>
Add code necessary to program the FPGA part of SoCFPGA from U-Boot
with an RBF blob. This patch also integrates the code into the
FPGA driver framework in U-Boot so it can be used via the 'fpga'
command.

Signed-off-by: Pavel Machek &lt;pavel@denx.de&gt;
Signed-off-by: Marek Vasut &lt;marex@denx.de&gt;
Cc: Chin Liang See &lt;clsee@altera.com&gt;
Cc: Dinh Nguyen &lt;dinguyen@altera.com&gt;
Cc: Albert Aribaud &lt;albert.u.boot@aribaud.net&gt;
Cc: Tom Rini &lt;trini@ti.com&gt;
Cc: Wolfgang Denk &lt;wd@denx.de&gt;
Cc: Pavel Machek &lt;pavel@denx.de&gt;

V2: Move the not-CPU specific stuff into drivers/fpga/ and base
    this on the cleaned up altera FPGA support.
</content>
</entry>
<entry>
<title>drivers: descend into sub directories only when it is necessary</title>
<updated>2013-11-17T19:11:30Z</updated>
<author>
<name>Masahiro Yamada</name>
<email>yamada.m@jp.panasonic.com</email>
</author>
<published>2013-11-11T05:35:51Z</published>
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<id>urn:sha1:7b6af41ef342199e4967735ea17424b42ed742d2</id>
<content type='text'>
- Descend into drivers/fpga/ only when CONFIG_FPGA=y
  - Descend into drivers/bios_emulator only when CONFIG_BIOSEMU=y

Signed-off-by: Masahiro Yamada &lt;yamada.m@jp.panasonic.com&gt;
</content>
</entry>
<entry>
<title>drivers: convert makefiles to Kbuild style</title>
<updated>2013-10-31T17:26:01Z</updated>
<author>
<name>Masahiro Yamada</name>
<email>yamada.m@jp.panasonic.com</email>
</author>
<published>2013-10-17T08:34:57Z</published>
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<id>urn:sha1:710f1d3d5f44731665a0d801d166c0f98c1de38e</id>
<content type='text'>
Signed-off-by: Masahiro Yamada &lt;yamada.m@jp.panasonic.com&gt;
</content>
</entry>
<entry>
<title>Add GPL-2.0+ SPDX-License-Identifier to source files</title>
<updated>2013-07-24T13:44:38Z</updated>
<author>
<name>Wolfgang Denk</name>
<email>wd@denx.de</email>
</author>
<published>2013-07-08T07:37:19Z</published>
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<id>urn:sha1:1a4596601fd395f3afb8f82f3f840c5e00bdd57a</id>
<content type='text'>
Signed-off-by: Wolfgang Denk &lt;wd@denx.de&gt;
[trini: Fixup common/cmd_io.c]
Signed-off-by: Tom Rini &lt;trini@ti.com&gt;
</content>
</entry>
<entry>
<title>fpga: zynq: Add support for loading bitstream</title>
<updated>2013-05-06T08:41:24Z</updated>
<author>
<name>Michal Simek</name>
<email>michal.simek@xilinx.com</email>
</author>
<published>2013-04-22T13:43:02Z</published>
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<id>urn:sha1:d5dae85f23c7c902731512e451afde9a6e4a250a</id>
<content type='text'>
Devcfg device requires to load bitstream in binary format.
But u-boot also has an option for loading bitstream in bit
format. Let's handle both cases by zynqpl driver.
Also add suport for loading partial bitstreams.

The first driver version was done by:
Joe Hershberger &lt;joe.hershberger@ni.com&gt;

Signed-off-by: Michal Simek &lt;michal.simek@xilinx.com&gt;
Reviewed-by: Tom Rini &lt;trini@ti.com&gt;
</content>
</entry>
<entry>
<title>Switch from archive libraries to partial linking</title>
<updated>2010-11-17T20:02:18Z</updated>
<author>
<name>Sebastien Carlier</name>
<email>sebastien.carlier@gmail.com</email>
</author>
<published>2010-11-05T14:48:07Z</published>
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<id>urn:sha1:6d8962e814c15807dd6ac5757904be2a02d187b8</id>
<content type='text'>
Before this commit, weak symbols were not overridden by non-weak symbols
found in archive libraries when linking with recent versions of
binutils.  As stated in the System V ABI, "the link editor does not
extract archive members to resolve undefined weak symbols".

This commit changes all Makefiles to use partial linking (ld -r) instead
of creating library archives, which forces all symbols to participate in
linking, allowing non-weak symbols to override weak symbols as intended.
This approach is also used by Linux, from which the gmake function
cmd_link_o_target (defined in config.mk and used in all Makefiles) is
inspired.

The name of each former library archive is preserved except for
extensions which change from ".a" to ".o".  This commit updates
references accordingly where needed, in particular in some linker
scripts.

This commit reveals board configurations that exclude some features but
include source files that depend these disabled features in the build,
resulting in undefined symbols.  Known such cases include:
- disabling CMD_NET but not CMD_NFS;
- enabling CONFIG_OF_LIBFDT but not CONFIG_QE.

Signed-off-by: Sebastien Carlier &lt;sebastien.carlier@gmail.com&gt;
</content>
</entry>
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