u-boot.git/drivers/fpga/altera.c, branch master

Replace TARGET namespace and cleanup properly

2026-02-14T17:06:46+00:00

TARGET namespace is for machines / boards / what-have-you that
building U-Boot for. Simply replace from TARGET to ARCH
make things more clear and proper for ALL SoCFPGA.

Signed-off-by: Brian Sune 
Reviewed-by: Tien Fong Chee 

# Conflicts:
#	drivers/ddr/altera/Makefile

fpga: Remove ancient ACEX1K support

2025-08-25T14:20:48+00:00

Coverity (CID 583149) reports issue on code which is not enabled by any
real platform that's why remove it completely.

Acked-by: Alexander Dahl 
Signed-off-by: Michal Simek 
Link: https://lore.kernel.org/r/20fe425910b6266a2bf0555bda67f60c1dd3aa61.1753686468.git.michal.simek@amd.com

drivers: fpga: Follow mainline to pass compatible flags to fpga_load

2025-04-16T11:42:06+00:00

Introducing additional flag to check whether an FPGA driver is able to
load a particular FPGA bitstream image.

Generally, flag variable is used to enable or disable certain features,
specify additional parameters (such as error handling), or modify how
the function operates.

Hence, in this function flags is an integer that can be used to pass
configuration options to the fpga_load function. Here, it's
initialized to 0, meaning no special options are enabled, but it could
modify the flags to influence the function's behavior.

Signed-off-by: Muhammad Hazim Izzat Zamri 
Link: https://lore.kernel.org/r/20250314021953.18379-3-muhammad.hazim.izzat.zamri@altera.com
Signed-off-by: Michal Simek

drivers: fpga: Add FPGA configuration during bootm for Intel SOCFPGA

2025-04-16T11:42:06+00:00

Enabling the capability to automatically perform FPGA configuration
when booting Linux FIT image via bootm command. The FPGA
configuration bitstream shall be packed within the FIT image.

The FPGA data (full or partial) is checked by the SDM hardware,
for Intel SDM Mailbox based devices. Hence always return full
bitstream.

Second function is to enable the HPS to FPGA bridges when FPGA load
is completed successfully. This is to ensure the FPGA is accessible
by the HPS.

Signed-off-by: Muhammad Hazim Izzat Zamri 
Link: https://lore.kernel.org/r/20250314021953.18379-2-muhammad.hazim.izzat.zamri@altera.com
Signed-off-by: Michal Simek

Restore patch series "arm: dts: am62-beagleplay: Fix Beagleplay Ethernet"

2024-05-20T19:35:03+00:00

As part of bringing the master branch back in to next, we need to allow
for all of these changes to exist here.

Reported-by: Jonas Karlman 
Signed-off-by: Tom Rini

Revert "Merge patch series "arm: dts: am62-beagleplay: Fix Beagleplay Ethernet""

2024-05-19T14:16:36+00:00

When bringing in the series 'arm: dts: am62-beagleplay: Fix Beagleplay
Ethernet"' I failed to notice that b4 noticed it was based on next and
so took that as the base commit and merged that part of next to master.

This reverts commit c8ffd1356d42223cbb8c86280a083cc3c93e6426, reversing
changes made to 2ee6f3a5f7550de3599faef9704e166e5dcace35.

Reported-by: Jonas Karlman 
Signed-off-by: Tom Rini

fpga: Remove and add needed includes

2024-05-07T14:00:53+00:00

Remove  from this driver directory and when needed
add missing include files directly.

Signed-off-by: Tom Rini

fpga: altera: Use logging feature instead of FPGA_DEBUG

2022-10-10T10:28:08+00:00

Instead of using DEBUG or LOG_DEBUG the driver still had its own
definition for debug output.

Signed-off-by: Alexander Dahl 
Signed-off-by: Michal Simek 
Link: https://lore.kernel.org/r/20221007122003.11239-6-ada@thorsis.com

fpga: altera: Rename Stratix10 FPGA to Intel FPGA SDM Mailbox

2020-10-09T09:53:12+00:00

Rename Stratix10 FPGA driver to Intel FPGA SDM Mailbox driver
because it is using generic SDM (Secure Device Manager) Mailbox
interface shared by other platform (e.g. Agilex) as well.

Signed-off-by: Chee Hong Ang 
Reviewed-by: Ley Foon Tan

common: Drop log.h from common header

2020-05-19T01:19:18+00:00

Move this header out of the common header.

Signed-off-by: Simon Glass