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<title>u-boot.git/drivers/fpga, branch master</title>
<subtitle>Unnamed repository; edit this file 'description' to name the repository.</subtitle>
<id>http://cgit.235523.xyz/u-boot.git/atom/drivers/fpga?h=master</id>
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<updated>2026-07-08T06:55:51Z</updated>
<entry>
<title>drivers: fpga: Use FPGA_INTEL_SDM_MAILBOX conditional instead of Agilex/Stratix10</title>
<updated>2026-07-08T06:55:51Z</updated>
<author>
<name>Danish Ahmad Rosdi</name>
<email>danish.ahmad.rosdi@altera.com</email>
</author>
<published>2026-06-08T09:45:47Z</published>
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<id>urn:sha1:7edbbfca632a97104b9bbe0ba6ba7accea395822</id>
<content type='text'>
Replace the conditional compilation checks for
CONFIG_ARCH_SOCFPGA_AGILEX and CONFIG_ARCH_SOCFPGA_STRATIX10 with
CONFIG_FPGA_INTEL_SDM_MAILBOX.

Signed-off-by: Danish Ahmad Rosdi &lt;danish.ahmad.rosdi@altera.com&gt;
Signed-off-by: Chen Huei Lok &lt;chen.huei.lok@altera.com&gt;
Signed-off-by: Michal Simek &lt;michal.simek@amd.com&gt;
Link: https://lore.kernel.org/r/20260608094547.3026-1-chen.huei.lok@altera.com
</content>
</entry>
<entry>
<title>treewide: prefer __func__ over __FUNCTION__ and __PRETTY_FUNCTION__</title>
<updated>2026-06-10T20:49:46Z</updated>
<author>
<name>Aristo Chen</name>
<email>aristo.chen@canonical.com</email>
</author>
<published>2026-05-26T01:41:40Z</published>
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<id>urn:sha1:6c636eabbde7f7915fe37c84395b23c61c66ce64</id>
<content type='text'>
__FUNCTION__ and __PRETTY_FUNCTION__ are gcc extensions that predate
the C99 __func__ identifier. scripts/checkpatch.pl emits a warning
for any new use of __FUNCTION__ and recommends __func__ instead. In
C (unlike C++) __PRETTY_FUNCTION__ is identical to __func__ because
C function names do not carry signature information, so the
distinction has no behavioural effect here. The majority of the tree
already uses __func__, but a handful of older files in arch/, board/,
boot/, drivers/, examples/ and include/ still carry the gcc spellings
(55 occurrences of __FUNCTION__ across 19 files plus one
__PRETTY_FUNCTION__ in drivers/usb/musb-new/omap2430.c). Convert
them all to the C99 form so the tree is consistent and new patches
in these areas do not have to follow an outdated local style.

Ten "Unnecessary ftrace-like logging - prefer using ftrace" warnings
remain on the printf("%s\n", __func__) and dbg("%s\n", __func__)
function-entry traces in drivers/net/rtl8169.c (behind DEBUG_RTL8169*
preprocessor guards) and drivers/usb/host/ohci-hcd.c. checkpatch
matches the literal "%s\n", __func__ shape regardless of the wrapper,
so silencing those warnings would require changing the debug message
text or removing the traces entirely.

Signed-off-by: Aristo Chen &lt;aristo.chen@canonical.com&gt;
Reviewed-by: Tom Rini &lt;trini@konsulko.com&gt;
</content>
</entry>
<entry>
<title>fpga: versalpl: Fix unaligned buffer handling</title>
<updated>2026-05-25T13:14:05Z</updated>
<author>
<name>Pranav Tilak</name>
<email>pranav.vinaytilak@amd.com</email>
</author>
<published>2026-05-07T11:33:59Z</published>
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<id>urn:sha1:9793931f36d585878305ff0bf907b32138673b95</id>
<content type='text'>
When fpga load is called with a misaligned buffer address, the
versal_align_dma_buffer() function shifts the pointer forward to the
next aligned boundary and uses memcpy() to copy the data. Since the
destination is ahead of the source and the regions overlap, memcpy()
produces undefined behavior; in practice U-Boot's generic memcpy()
copies forward, repeating the first ARCH_DMA_MINALIGN-aligned chunk
throughout the buffer.

Replace memcpy() with memmove() which correctly handles overlapping
regions by copying backwards when the destination is ahead of the
source.

Fixes: 26e054c943a7 ("arm64: versal: fpga: Add PL bit stream load support")
Signed-off-by: Pranav Tilak &lt;pranav.vinaytilak@amd.com&gt;
Signed-off-by: Michal Simek &lt;michal.simek@amd.com&gt;
Link: https://lore.kernel.org/r/20260507113359.3665220-1-pranav.vinaytilak@amd.com
</content>
</entry>
<entry>
<title>fpga: xilinx: Add option to skip bitstream ID check</title>
<updated>2026-04-23T09:51:48Z</updated>
<author>
<name>Michal Simek</name>
<email>michal.simek@amd.com</email>
</author>
<published>2026-04-16T17:32:02Z</published>
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<id>urn:sha1:8669c34566cc6cfcdb32239eeedf991ecb83a5ea</id>
<content type='text'>
Add environment variable 'fpga_skip_idcheck' that when set to '1' or
'y' allows bypassing the device ID validation during bitstream loading.
This is useful for loading bitstreams on devices whose ID codes are not
yet recorded in the SOC driver.

Usage: setenv fpga_skip_idcheck 1
  fpga loadb 0 ${loadaddr} ${filesize}

Signed-off-by: Michal Simek &lt;michal.simek@amd.com&gt;
Link: https://lore.kernel.org/r/d0f11d0a8d48b284683f00d20dfbe323c11f2943.1776360720.git.michal.simek@amd.com
</content>
</entry>
<entry>
<title>Replace TARGET namespace and cleanup properly</title>
<updated>2026-02-14T17:06:46Z</updated>
<author>
<name>Tien Fong Chee</name>
<email>tien.fong.chee@altera.com</email>
</author>
<published>2026-02-13T12:27:23Z</published>
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<id>urn:sha1:62f7a94602094617ac384839ed695c2906893a88</id>
<content type='text'>
TARGET namespace is for machines / boards / what-have-you that
building U-Boot for. Simply replace from TARGET to ARCH
make things more clear and proper for ALL SoCFPGA.

Signed-off-by: Brian Sune &lt;briansune@gmail.com&gt;
Reviewed-by: Tien Fong Chee &lt;tien.fong.chee@altera.com&gt;

# Conflicts:
#	drivers/ddr/altera/Makefile
</content>
</entry>
<entry>
<title>drivers: firmware: update xilinx_pm_request to support max payload</title>
<updated>2025-10-09T07:07:03Z</updated>
<author>
<name>Naman Trivedi</name>
<email>naman.trivedimanojbhai@amd.com</email>
</author>
<published>2025-08-28T13:42:22Z</published>
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<id>urn:sha1:4146a31dcec709058a8e793b86712b0ffa1ba15a</id>
<content type='text'>
Currently xilinx_pm_request API supports four u32 payloads. However the
legacy SMC format supports five u32 request payloads and extended SMC
format supports six u32 request payloads. Add support for the same in
xilinx_pm_request API. Also add two dummy arguments to all the callers
of xilinx_pm_request.

The TF-A always fills seven u32 return payload so add support
for the same in xilinx_pm_request API.

Signed-off-by: Naman Trivedi &lt;naman.trivedimanojbhai@amd.com&gt;
Signed-off-by: Venkatesh Yadav Abbarapu &lt;venkatesh.abbarapu@amd.com&gt;
Acked-by: Senthil Nathan Thangaraj &lt;senthilnathan.thangaraj@amd.com&gt;
Signed-off-by: Michal Simek &lt;michal.simek@amd.com&gt;
Link: https://lore.kernel.org/r/5ae6b560741f3ca8b89059c4ebb87acf75b4718e.1756388537.git.michal.simek@amd.com
</content>
</entry>
<entry>
<title>fpga: lattice: Remove unused support</title>
<updated>2025-08-25T14:20:48Z</updated>
<author>
<name>Michal Simek</name>
<email>michal.simek@amd.com</email>
</author>
<published>2025-07-28T07:07:54Z</published>
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<id>urn:sha1:34762f6c007c53d8540c1cb8bcf02ccddedb704f</id>
<content type='text'>
There is no single platform which is using this driver that's why remove it
completely. Some issues regarding this code are also reported by Coverity
(CID 583143, 583144, 583145, 583146).

Signed-off-by: Michal Simek &lt;michal.simek@amd.com&gt;
Link: https://lore.kernel.org/r/367cd55ab8d9fb262ac23fe748babc6b2b59bee0.1753686468.git.michal.simek@amd.com
</content>
</entry>
<entry>
<title>fpga: Remove ancient ACEX1K support</title>
<updated>2025-08-25T14:20:48Z</updated>
<author>
<name>Michal Simek</name>
<email>michal.simek@amd.com</email>
</author>
<published>2025-07-28T07:07:53Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=0870281a415d33b20ca4a2ff072ab55c1b71bcb5'/>
<id>urn:sha1:0870281a415d33b20ca4a2ff072ab55c1b71bcb5</id>
<content type='text'>
Coverity (CID 583149) reports issue on code which is not enabled by any
real platform that's why remove it completely.

Acked-by: Alexander Dahl &lt;ada@thorsis.com&gt;
Signed-off-by: Michal Simek &lt;michal.simek@amd.com&gt;
Link: https://lore.kernel.org/r/20fe425910b6266a2bf0555bda67f60c1dd3aa61.1753686468.git.michal.simek@amd.com
</content>
</entry>
<entry>
<title>fpga: xilinx: Check valid desc structure</title>
<updated>2025-08-25T14:20:48Z</updated>
<author>
<name>Michal Simek</name>
<email>michal.simek@amd.com</email>
</author>
<published>2025-07-28T07:07:52Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=7fc04c9a82e858a1d042d8c7b008831c28d5965e'/>
<id>urn:sha1:7fc04c9a82e858a1d042d8c7b008831c28d5965e</id>
<content type='text'>
FPGA validation can fail and return value needs to be checked.

Addresses-Coverity-ID: CID 583150: Null pointer dereferences  (NULL_RETURNS)
Signed-off-by: Michal Simek &lt;michal.simek@amd.com&gt;
Link: https://lore.kernel.org/r/876b6f8dbc99ca305460183dbd18635a35ccc989.1753686468.git.michal.simek@amd.com
</content>
</entry>
<entry>
<title>fpga: cyclon2: Remove message never printed</title>
<updated>2025-08-25T14:20:47Z</updated>
<author>
<name>Alexander Dahl</name>
<email>ada@thorsis.com</email>
</author>
<published>2025-08-04T09:08:16Z</published>
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<id>urn:sha1:818f6002e1429aa42f7efda06d3fe742ebf65e93</id>
<content type='text'>
else branch is never reached.  Print "Done." anyways to keep behaviour.

Addresses-Coverity-ID: 583148
Link: https://lore.kernel.org/u-boot/20250725132645.GA1807455@bill-the-cat/
Fixes: f0ff4692ff33 ("Add FPGA Altera Cyclone 2 support Patch by Heiko Schocher, 15 Aug 2006")
Signed-off-by: Alexander Dahl &lt;ada@thorsis.com&gt;
Link: https://lore.kernel.org/r/20250804090816.42603-1-ada@thorsis.com
Signed-off-by: Michal Simek &lt;michal.simek@amd.com&gt;
</content>
</entry>
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