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<title>u-boot.git/drivers/fpga, branch v2011.03</title>
<subtitle>Unnamed repository; edit this file 'description' to name the repository.
</subtitle>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/'/>
<entry>
<title>add Xilinx_abort_fn to Xilinx_Spartan3_Slave_Serial_fns</title>
<updated>2010-11-30T20:59:21+00:00</updated>
<author>
<name>Wolfgang Wegner</name>
<email>w.wegner@astro-kom.de</email>
</author>
<published>2010-04-23T09:08:05+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=b0bc8b70ff74501fd7a6e42013a4a7ea05cf6ade'/>
<id>b0bc8b70ff74501fd7a6e42013a4a7ea05cf6ade</id>
<content type='text'>
Currently the hardware was left in an undefined state in case Spartan3
serial load failed. This patch adds Xilinx_abort_fn to give the board
a possibility to clean up in this case.

Signed-off-by: Wolfgang Wegner &lt;w.wegner@astro-kom.de&gt;
</content>
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<pre>
Currently the hardware was left in an undefined state in case Spartan3
serial load failed. This patch adds Xilinx_abort_fn to give the board
a possibility to clean up in this case.

Signed-off-by: Wolfgang Wegner &lt;w.wegner@astro-kom.de&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>Switch from archive libraries to partial linking</title>
<updated>2010-11-17T20:02:18+00:00</updated>
<author>
<name>Sebastien Carlier</name>
<email>sebastien.carlier@gmail.com</email>
</author>
<published>2010-11-05T14:48:07+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=6d8962e814c15807dd6ac5757904be2a02d187b8'/>
<id>6d8962e814c15807dd6ac5757904be2a02d187b8</id>
<content type='text'>
Before this commit, weak symbols were not overridden by non-weak symbols
found in archive libraries when linking with recent versions of
binutils.  As stated in the System V ABI, "the link editor does not
extract archive members to resolve undefined weak symbols".

This commit changes all Makefiles to use partial linking (ld -r) instead
of creating library archives, which forces all symbols to participate in
linking, allowing non-weak symbols to override weak symbols as intended.
This approach is also used by Linux, from which the gmake function
cmd_link_o_target (defined in config.mk and used in all Makefiles) is
inspired.

The name of each former library archive is preserved except for
extensions which change from ".a" to ".o".  This commit updates
references accordingly where needed, in particular in some linker
scripts.

This commit reveals board configurations that exclude some features but
include source files that depend these disabled features in the build,
resulting in undefined symbols.  Known such cases include:
- disabling CMD_NET but not CMD_NFS;
- enabling CONFIG_OF_LIBFDT but not CONFIG_QE.

Signed-off-by: Sebastien Carlier &lt;sebastien.carlier@gmail.com&gt;
</content>
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<pre>
Before this commit, weak symbols were not overridden by non-weak symbols
found in archive libraries when linking with recent versions of
binutils.  As stated in the System V ABI, "the link editor does not
extract archive members to resolve undefined weak symbols".

This commit changes all Makefiles to use partial linking (ld -r) instead
of creating library archives, which forces all symbols to participate in
linking, allowing non-weak symbols to override weak symbols as intended.
This approach is also used by Linux, from which the gmake function
cmd_link_o_target (defined in config.mk and used in all Makefiles) is
inspired.

The name of each former library archive is preserved except for
extensions which change from ".a" to ".o".  This commit updates
references accordingly where needed, in particular in some linker
scripts.

This commit reveals board configurations that exclude some features but
include source files that depend these disabled features in the build,
resulting in undefined symbols.  Known such cases include:
- disabling CMD_NET but not CMD_NFS;
- enabling CONFIG_OF_LIBFDT but not CONFIG_QE.

Signed-off-by: Sebastien Carlier &lt;sebastien.carlier@gmail.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>Coding Style cleanup</title>
<updated>2010-10-27T20:48:30+00:00</updated>
<author>
<name>Wolfgang Denk</name>
<email>wd@denx.de</email>
</author>
<published>2010-10-27T20:48:30+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=071bc923308832bbc541a887fece767d79a6dc7a'/>
<id>071bc923308832bbc541a887fece767d79a6dc7a</id>
<content type='text'>
Signed-off-by: Wolfgang Denk &lt;wd@denx.de&gt;
</content>
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<pre>
Signed-off-by: Wolfgang Denk &lt;wd@denx.de&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>FPGA: fix support for non-Lattice devices</title>
<updated>2010-10-18T19:32:14+00:00</updated>
<author>
<name>Wolfgang Denk</name>
<email>wd@denx.de</email>
</author>
<published>2010-10-18T19:32:14+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=439f6f7ec17e267745d6667f9920514fa8da6b58'/>
<id>439f6f7ec17e267745d6667f9920514fa8da6b58</id>
<content type='text'>
Commit 3b8ac464 "FPGA: add support for downloading Lattice bitstream"
added support for Lattice devices, but failed to add #ifdef's that are
needed when building for non-Lattice devices, which results in build
failures like these:

Configuring for GEN860T board...
drivers/fpga/libfpga.a(fpga.o): In function `fpga_dev_info':
/home/wd/git/u-boot/work/drivers/fpga/fpga.c:145: undefined reference to `lattice_info'
drivers/fpga/libfpga.a(fpga.o): In function `fpga_dump':
/home/wd/git/u-boot/work/drivers/fpga/fpga.c:269: undefined reference to `lattice_dump'
drivers/fpga/libfpga.a(fpga.o): In function `fpga_load':
/home/wd/git/u-boot/work/drivers/fpga/fpga.c:233: undefined reference to `lattice_load'
make: *** [u-boot] Error 1

Add the missing code.

Signed-off-by: Wolfgang Denk &lt;wd@denx.de&gt;
Cc: Stefano Babic &lt;sbabic@denx.de&gt;
</content>
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<pre>
Commit 3b8ac464 "FPGA: add support for downloading Lattice bitstream"
added support for Lattice devices, but failed to add #ifdef's that are
needed when building for non-Lattice devices, which results in build
failures like these:

Configuring for GEN860T board...
drivers/fpga/libfpga.a(fpga.o): In function `fpga_dev_info':
/home/wd/git/u-boot/work/drivers/fpga/fpga.c:145: undefined reference to `lattice_info'
drivers/fpga/libfpga.a(fpga.o): In function `fpga_dump':
/home/wd/git/u-boot/work/drivers/fpga/fpga.c:269: undefined reference to `lattice_dump'
drivers/fpga/libfpga.a(fpga.o): In function `fpga_load':
/home/wd/git/u-boot/work/drivers/fpga/fpga.c:233: undefined reference to `lattice_load'
make: *** [u-boot] Error 1

Add the missing code.

Signed-off-by: Wolfgang Denk &lt;wd@denx.de&gt;
Cc: Stefano Babic &lt;sbabic@denx.de&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>FPGA: add support for downloading Lattice bitstream</title>
<updated>2010-10-13T16:09:31+00:00</updated>
<author>
<name>Stefano Babic</name>
<email>sbabic@denx.de</email>
</author>
<published>2010-06-29T09:47:48+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=3b8ac464f25581a7d22b303a9154c05e0c7f40a8'/>
<id>3b8ac464f25581a7d22b303a9154c05e0c7f40a8</id>
<content type='text'>
The patch adds support to load a Lattice's bitstream
image (called VME file) into a Lattice FPGA. The code
containing the state machine delivered as part of
Lattice's ispVMtools is integrated.

The FPGA is programmed using the JTAG interface. The
board maintainer must provide accessors to drive the
JTAG signals TCK, TMS, TDI and to get the value of the
input signal TDO.

Signed-off-by: Stefano Babic &lt;sbabic@denx.de&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
The patch adds support to load a Lattice's bitstream
image (called VME file) into a Lattice FPGA. The code
containing the state machine delivered as part of
Lattice's ispVMtools is integrated.

The FPGA is programmed using the JTAG interface. The
board maintainer must provide accessors to drive the
JTAG signals TCK, TMS, TDI and to get the value of the
input signal TDO.

Signed-off-by: Stefano Babic &lt;sbabic@denx.de&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>add block write function to spartan3 slave serial load</title>
<updated>2010-03-24T16:08:43+00:00</updated>
<author>
<name>Wolfgang Wegner</name>
<email>w.wegner@astro-kom.de</email>
</author>
<published>2009-10-30T15:55:02+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=89083346d0627a5e6e271e61bd34ab5121f9462b'/>
<id>89083346d0627a5e6e271e61bd34ab5121f9462b</id>
<content type='text'>
Using seperate function calls for each bit-bang of slave serial
load can be painfully slow. This patch adds the possibility to
supply a block write function that loads the complete block of
data in one call (like it can already be done with Altera FPGAs).
On an MCF5373L (240 MHz) loading an XC3S4000 this reduces the load
time from around 15 seconds to around 3 seconds

Signed-off-by: Wolfgang Wegner &lt;w.wegner at astro-kom.de&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Using seperate function calls for each bit-bang of slave serial
load can be painfully slow. This patch adds the possibility to
supply a block write function that loads the complete block of
data in one call (like it can already be done with Altera FPGAs).
On an MCF5373L (240 MHz) loading an XC3S4000 this reduces the load
time from around 15 seconds to around 3 seconds

Signed-off-by: Wolfgang Wegner &lt;w.wegner at astro-kom.de&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>fpga: Remove relocation fixups</title>
<updated>2009-10-03T08:17:56+00:00</updated>
<author>
<name>Peter Tyser</name>
<email>ptyser@xes-inc.com</email>
</author>
<published>2009-09-21T16:20:32+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=6385b28116f775da4771b768ba9bf93c3aaaf26e'/>
<id>6385b28116f775da4771b768ba9bf93c3aaaf26e</id>
<content type='text'>
PPC boards are the only users of the current FPGA code which is littered
with manual relocation fixups.  Now that proper relocation is supported
for PPC boards, remove FPGA manual relocation.

Signed-off-by: Peter Tyser &lt;ptyser@xes-inc.com&gt;
</content>
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<pre>
PPC boards are the only users of the current FPGA code which is littered
with manual relocation fixups.  Now that proper relocation is supported
for PPC boards, remove FPGA manual relocation.

Signed-off-by: Peter Tyser &lt;ptyser@xes-inc.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>fpga: Fix Spartan III FPGA booting</title>
<updated>2009-02-21T21:52:44+00:00</updated>
<author>
<name>Matthias Fuchs</name>
<email>matthias.fuchs@esd.eu</email>
</author>
<published>2009-02-15T21:29:15+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=670cbde8da83690fed1064c3358f54ae1d693ed2'/>
<id>670cbde8da83690fed1064c3358f54ae1d693ed2</id>
<content type='text'>
This patch does some minor fixing of the Xilinx Spartan III
FPGA boot code:

- Fixed call order of post configuration callback and
  success message printing (result of copy-paste?)
- remove obsolete comment
- minor coding style cleanup

Signed-off-by: Matthias Fuchs &lt;matthias.fuchs@esd-electronics.com&gt;
</content>
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<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
This patch does some minor fixing of the Xilinx Spartan III
FPGA boot code:

- Fixed call order of post configuration callback and
  success message printing (result of copy-paste?)
- remove obsolete comment
- minor coding style cleanup

Signed-off-by: Matthias Fuchs &lt;matthias.fuchs@esd-electronics.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>fpga: Fix Spartan II FPGA booting</title>
<updated>2009-02-21T21:52:43+00:00</updated>
<author>
<name>Matthias Fuchs</name>
<email>matthias.fuchs@esd.eu</email>
</author>
<published>2009-02-15T21:28:36+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=3818b677641038d27b2663fbd6771ad38c932f86'/>
<id>3818b677641038d27b2663fbd6771ad38c932f86</id>
<content type='text'>
This patch does some minor fixing of the Xilinx Spartan II
FPGA boot code:

- Fixed call order of post configuration callback and
  success message printing (result of copy-paste?)
- relocate post configuration callback only when it
  is implemented
- remove obsolete comment
- minor coding style cleanup

Signed-off-by: Matthias Fuchs &lt;matthias.fuchs@esd-electronics.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
This patch does some minor fixing of the Xilinx Spartan II
FPGA boot code:

- Fixed call order of post configuration callback and
  success message printing (result of copy-paste?)
- relocate post configuration callback only when it
  is implemented
- remove obsolete comment
- minor coding style cleanup

Signed-off-by: Matthias Fuchs &lt;matthias.fuchs@esd-electronics.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>FPGA: move fpga drivers to drivers/fpga</title>
<updated>2008-12-05T21:41:33+00:00</updated>
<author>
<name>Jean-Christophe PLAGNIOL-VILLARD</name>
<email>plagnioj@jcrosoft.com</email>
</author>
<published>2008-10-31T11:26:55+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=c8aa7dfc18f7cc90d0aea6c7becbb67dfc5bba4b'/>
<id>c8aa7dfc18f7cc90d0aea6c7becbb67dfc5bba4b</id>
<content type='text'>
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD &lt;plagnioj@jcrosoft.com&gt;
</content>
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<pre>
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD &lt;plagnioj@jcrosoft.com&gt;
</pre>
</div>
</content>
</entry>
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