<feed xmlns='http://www.w3.org/2005/Atom'>
<title>u-boot.git/drivers/fpga, branch v2016.07</title>
<subtitle>Unnamed repository; edit this file 'description' to name the repository.
</subtitle>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/'/>
<entry>
<title>fpga: Fix typo in function comment</title>
<updated>2016-05-24T09:15:02+00:00</updated>
<author>
<name>Michal Simek</name>
<email>michal.simek@xilinx.com</email>
</author>
<published>2016-05-17T12:32:00+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=905bca6c2d65fc639cffdca42004602e041eb97a'/>
<id>905bca6c2d65fc639cffdca42004602e041eb97a</id>
<content type='text'>
Trivial patch.

Signed-off-by: Michal Simek &lt;michal.simek@xilinx.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Trivial patch.

Signed-off-by: Michal Simek &lt;michal.simek@xilinx.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>fpga: altera: Add StratixV support</title>
<updated>2016-03-24T08:47:43+00:00</updated>
<author>
<name>Stefan Roese</name>
<email>sr@denx.de</email>
</author>
<published>2016-02-12T12:48:02+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=ff9c4c535a8b722c54d45e77aa083fa08552341d'/>
<id>ff9c4c535a8b722c54d45e77aa083fa08552341d</id>
<content type='text'>
This patch adds support for programming of the StratixV FPGAs. Programming
is done in this case (board theadorable) via SPI. The board may provide
board specific code for bitstream programming.

This StratixV support will be used by the theadorable board.

Signed-off-by: Stefan Roese &lt;sr@denx.de&gt;
Cc: Tom Rini &lt;trini@konsulko.com&gt;
Signed-off-by: Stefan Roese &lt;sr@denx.de&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
This patch adds support for programming of the StratixV FPGAs. Programming
is done in this case (board theadorable) via SPI. The board may provide
board specific code for bitstream programming.

This StratixV support will be used by the theadorable board.

Signed-off-by: Stefan Roese &lt;sr@denx.de&gt;
Cc: Tom Rini &lt;trini@konsulko.com&gt;
Signed-off-by: Stefan Roese &lt;sr@denx.de&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>Fix spelling of "transferred".</title>
<updated>2016-03-22T16:16:16+00:00</updated>
<author>
<name>Vagrant Cascadian</name>
<email>vagrant@debian.org</email>
</author>
<published>2016-03-15T19:16:39+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=a6f70a3d1456e6ce97e0f00ac2d5ff8ae22027d6'/>
<id>a6f70a3d1456e6ce97e0f00ac2d5ff8ae22027d6</id>
<content type='text'>
Signed-off-by: Vagrant Cascadian &lt;vagrant@debian.org&gt;
Acked-by: Marek Vasut &lt;marex@denx.de&gt;
Reviewed-by: Simon Glass &lt;sjg@chromium.org&gt;
Reviewed-by: Tom Rini &lt;trini@konsulko.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Signed-off-by: Vagrant Cascadian &lt;vagrant@debian.org&gt;
Acked-by: Marek Vasut &lt;marex@denx.de&gt;
Reviewed-by: Simon Glass &lt;sjg@chromium.org&gt;
Reviewed-by: Tom Rini &lt;trini@konsulko.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>Revert "arm: socfpga: set the fpga global bit to disable HPS to FPGA signals"</title>
<updated>2016-02-04T11:43:21+00:00</updated>
<author>
<name>Dinh Nguyen</name>
<email>dinguyen@kernel.org</email>
</author>
<published>2016-01-19T15:16:21+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=a409a8b85ee337250043aa0c031a31b3a6639e74'/>
<id>a409a8b85ee337250043aa0c031a31b3a6639e74</id>
<content type='text'>
Apparently, the logic for the FPGA global bit is not universal between Gen5
and Gen10 devices is not the same. Disabling this bit, while applicable to
Gen10 devices, will break FPGA programming on Gen5 devices.

Signed-off-by: Dinh Nguyen &lt;dinguyen@opensource.altera.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Apparently, the logic for the FPGA global bit is not universal between Gen5
and Gen10 devices is not the same. Disabling this bit, while applicable to
Gen10 devices, will break FPGA programming on Gen5 devices.

Signed-off-by: Dinh Nguyen &lt;dinguyen@opensource.altera.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>fpga: xilinx: Check for substring in device ID validation</title>
<updated>2016-01-27T14:55:53+00:00</updated>
<author>
<name>Siva Durga Prasad Paladugu</name>
<email>siva.durga.paladugu@xilinx.com</email>
</author>
<published>2016-01-11T07:00:41+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=f72132673a01216e760864e442f168977cce2bd2'/>
<id>f72132673a01216e760864e442f168977cce2bd2</id>
<content type='text'>
Check for substrings in deviceID validation check
so that it can support xa bitstreams also.

Signed-off-by: Siva Durga Prasad Paladugu &lt;sivadur@xilinx.com&gt;
Signed-off-by: Michal Simek &lt;michal.simek@xilinx.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Check for substrings in deviceID validation check
so that it can support xa bitstreams also.

Signed-off-by: Siva Durga Prasad Paladugu &lt;sivadur@xilinx.com&gt;
Signed-off-by: Michal Simek &lt;michal.simek@xilinx.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>arm: socfpga: set the fpga global bit to disable HPS to FPGA signals</title>
<updated>2016-01-16T06:07:22+00:00</updated>
<author>
<name>Dinh Nguyen</name>
<email>dinh.linux@gmail.com</email>
</author>
<published>2016-01-06T19:48:43+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=b00a21f0886fe4038ce64905479259879021a4a8'/>
<id>b00a21f0886fe4038ce64905479259879021a4a8</id>
<content type='text'>
We should be setting the FPGA Interface Group global bit that will correctly
disable all interfaces between the FPGA and HPS.

Signed-off-by: Dinh Nguyen &lt;dinguyen@opensource.altera.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
We should be setting the FPGA Interface Group global bit that will correctly
disable all interfaces between the FPGA and HPS.

Signed-off-by: Dinh Nguyen &lt;dinguyen@opensource.altera.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>Move console definitions into a new console.h file</title>
<updated>2015-11-20T03:27:50+00:00</updated>
<author>
<name>Simon Glass</name>
<email>sjg@chromium.org</email>
</author>
<published>2015-11-09T06:47:45+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=24b852a7a2b8eca71789100983bdb5104cc00696'/>
<id>24b852a7a2b8eca71789100983bdb5104cc00696</id>
<content type='text'>
The console includes a global variable and several functions that are only
used by a small subset of U-Boot files. Before adding more functions, move
the definitions into their own header file.

Signed-off-by: Simon Glass &lt;sjg@chromium.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
The console includes a global variable and several functions that are only
used by a small subset of U-Boot files. Before adding more functions, move
the definitions into their own header file.

Signed-off-by: Simon Glass &lt;sjg@chromium.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>arm: socfpga: Fix FPGA bitstream programming routine</title>
<updated>2015-08-08T12:14:04+00:00</updated>
<author>
<name>Marek Vasut</name>
<email>marex@denx.de</email>
</author>
<published>2015-07-27T20:34:54+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=bfa89d2ba8f0a278df6de584dcfbd33814753e33'/>
<id>bfa89d2ba8f0a278df6de584dcfbd33814753e33</id>
<content type='text'>
In case the FPGA bitstream is aligned to 4 bytes, skip the
part of the assembler which handles unaligned bitstream.
Otherwise, that part will loop indefinitelly.

Signed-off-by: Marek Vasut &lt;marex@denx.de&gt;
Cc: Dinh Nguyen &lt;dinguyen@opensource.altera.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
In case the FPGA bitstream is aligned to 4 bytes, skip the
part of the assembler which handles unaligned bitstream.
Otherwise, that part will loop indefinitelly.

Signed-off-by: Marek Vasut &lt;marex@denx.de&gt;
Cc: Dinh Nguyen &lt;dinguyen@opensource.altera.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>fpga: xilinx: Show fpga info if defined</title>
<updated>2015-01-21T09:25:43+00:00</updated>
<author>
<name>Michal Simek</name>
<email>michal.simek@xilinx.com</email>
</author>
<published>2014-07-16T08:36:42+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=e136eaeb4d3e9a8557eaad26f99c0f2e3db172ac'/>
<id>e136eaeb4d3e9a8557eaad26f99c0f2e3db172ac</id>
<content type='text'>
Show fpga_op-&gt;info even if desc-&gt;iface_fns is not defined.

Signed-off-by: Michal Simek &lt;michal.simek@xilinx.com&gt;
Reviewed-by: Simon Glass &lt;sjg@chromium.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Show fpga_op-&gt;info even if desc-&gt;iface_fns is not defined.

Signed-off-by: Michal Simek &lt;michal.simek@xilinx.com&gt;
Reviewed-by: Simon Glass &lt;sjg@chromium.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>fpga: xilinx: Check if fpga operations are defined</title>
<updated>2015-01-21T09:25:15+00:00</updated>
<author>
<name>Michal Simek</name>
<email>michal.simek@xilinx.com</email>
</author>
<published>2014-07-16T08:31:21+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=6cd68c811ecb145d4258ce6be99dba3e507b294f'/>
<id>6cd68c811ecb145d4258ce6be99dba3e507b294f</id>
<content type='text'>
Ensure that operations are correctly setup.

Signed-off-by: Michal Simek &lt;michal.simek@xilinx.com&gt;
Reviewed-by: Simon Glass &lt;sjg@chromium.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Ensure that operations are correctly setup.

Signed-off-by: Michal Simek &lt;michal.simek@xilinx.com&gt;
Reviewed-by: Simon Glass &lt;sjg@chromium.org&gt;
</pre>
</div>
</content>
</entry>
</feed>
