<feed xmlns='http://www.w3.org/2005/Atom'>
<title>u-boot.git/drivers/gpio/Makefile, branch v2018.01</title>
<subtitle>Unnamed repository; edit this file 'description' to name the repository.</subtitle>
<id>http://cgit.235523.xyz/u-boot.git/atom/drivers/gpio/Makefile?h=v2018.01</id>
<link rel='self' href='http://cgit.235523.xyz/u-boot.git/atom/drivers/gpio/Makefile?h=v2018.01'/>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/'/>
<updated>2017-11-24T16:37:56Z</updated>
<entry>
<title>ARC: HSDK: introduce CREG GPIO driver</title>
<updated>2017-11-24T16:37:56Z</updated>
<author>
<name>Eugeniy Paltsev</name>
<email>Eugeniy.Paltsev@synopsys.com</email>
</author>
<published>2017-10-16T13:21:32Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=3194c3cddf7bbb7d2d74097e54f587953d0bb35f'/>
<id>urn:sha1:3194c3cddf7bbb7d2d74097e54f587953d0bb35f</id>
<content type='text'>
The HSDK can manage some pins via CREG registers block.

Signed-off-by: Eugeniy Paltsev &lt;Eugeniy.Paltsev@synopsys.com&gt;
Signed-off-by: Alexey Brodkin &lt;abrodkin@synopsys.com&gt;
</content>
</entry>
<entry>
<title>gpio: rmobile: Add Renesas RCar GPIO driver</title>
<updated>2017-09-27T21:54:06Z</updated>
<author>
<name>Marek Vasut</name>
<email>marek.vasut@gmail.com</email>
</author>
<published>2017-09-15T19:13:56Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=f5f6959444d07bfc71221a6ba18a2b3eca195e05'/>
<id>urn:sha1:f5f6959444d07bfc71221a6ba18a2b3eca195e05</id>
<content type='text'>
Add GPIO driver for the Renesas RCar SoCs . The driver currently supports
only the RCar Gen3 R8A7795 and R8A7796 SoCs, but is easily extensible for
the other RCar SoCs as well.

This driver is meant to replace the pinmux part of SH_GPIO_PFC driver.

Signed-off-by: Marek Vasut &lt;marek.vasut+renesas@gmail.com&gt;
Cc: Nobuhiro Iwamatsu &lt;iwamatsu@nigauri.org&gt;
Signed-off-by: Nobuhiro Iwamatsu &lt;iwamatsu@nigauri.org&gt;
</content>
</entry>
<entry>
<title>gpio: Drop sx151x driver</title>
<updated>2017-08-11T19:42:00Z</updated>
<author>
<name>Simon Glass</name>
<email>sjg@chromium.org</email>
</author>
<published>2017-08-04T22:34:53Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=1c27a4c9494b28bbe018762e534b2291081745df'/>
<id>urn:sha1:1c27a4c9494b28bbe018762e534b2291081745df</id>
<content type='text'>
This driver is not used in U-Boot. Drop it and its associated CONFIG
options.

Signed-off-by: Simon Glass &lt;sjg@chromium.org&gt;
Reviewed-by: Bin Meng &lt;bmeng.cn@gmail.com&gt;
Reviewed-by: Philipp Tomsich &lt;philipp.tomsich@theobroma-systems.com&gt;
</content>
</entry>
<entry>
<title>gpio: samsung: Drop s3c2440_gpio driver</title>
<updated>2017-06-05T15:02:29Z</updated>
<author>
<name>Simon Glass</name>
<email>sjg@chromium.org</email>
</author>
<published>2017-05-17T14:22:41Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=2e5184dd5f88805985796267c4f5035a16d32d1a'/>
<id>urn:sha1:2e5184dd5f88805985796267c4f5035a16d32d1a</id>
<content type='text'>
This is no longer used in U-Boot. Drop it.

Signed-off-by: Simon Glass &lt;sjg@chromium.org&gt;
</content>
</entry>
<entry>
<title>dm: gpio: add BCM6345 gpio driver</title>
<updated>2017-05-10T14:16:09Z</updated>
<author>
<name>Álvaro Fernández Rojas</name>
<email>noltari@gmail.com</email>
</author>
<published>2017-05-07T18:09:30Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=e64bdb2fcfce7e002964e72f2732920ecda4b74c'/>
<id>urn:sha1:e64bdb2fcfce7e002964e72f2732920ecda4b74c</id>
<content type='text'>
This driver is based on linux/arch/mips/bcm63xx/gpio.c, simplified to allow
defining one or two independent banks for each Broadcom SoC.

Signed-off-by: Álvaro Fernández Rojas &lt;noltari@gmail.com&gt;
Reviewed-by: Simon Glass &lt;sjg@chromium.org&gt;
</content>
</entry>
<entry>
<title>dm: gpio: Add driver for stm32f7 gpio controller</title>
<updated>2017-05-08T15:57:02Z</updated>
<author>
<name>Vikas Manocha</name>
<email>vikas.manocha@st.com</email>
</author>
<published>2017-04-10T22:02:57Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=774171020beaf3af19dcc8056c9de38653bc121b'/>
<id>urn:sha1:774171020beaf3af19dcc8056c9de38653bc121b</id>
<content type='text'>
This patch adds gpio driver supporting driver model for stm32f7 gpio.

Signed-off-by: Vikas Manocha &lt;vikas.manocha@st.com&gt;
Reviewed-by: Simon Glass &lt;sjg@chromium.org&gt;
Cc: Christophe KERELLO &lt;christophe.kerello@st.com&gt;
[trini: Add depends on STM32]
Signed-off-by: Tom Rini &lt;trini@konsulko.com&gt;
</content>
</entry>
<entry>
<title>gpio: Add Rapid GPIO2P driver for i.MX7ULP</title>
<updated>2017-03-17T08:27:08Z</updated>
<author>
<name>Peng Fan</name>
<email>peng.fan@nxp.com</email>
</author>
<published>2017-02-22T08:21:45Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=d665eb6114c91f433473d4af8ff4e87e021b3ad8'/>
<id>urn:sha1:d665eb6114c91f433473d4af8ff4e87e021b3ad8</id>
<content type='text'>
Add the imx_rgpio2p driver for Rapid GPIO2P controllers on i.MX7ULP.
Have added all ports on RGPIO2P_0 and RGPIO2P_1.

The configurations CONFIG_IMX_RGPIO2P and CONFIG_DM_GPIO must be set
to y to enable the drivers.

To use the GPIO function, the IBE and OBE needs to set in IOMUXC.
We did not set the bits in driver, but leave them to IOMUXC settings
of the GPIO pins. User should use IMX_GPIO_NR to generate the GPIO number
for gpio APIs access.

Signed-off-by: Peng Fan &lt;peng.fan@nxp.com&gt;
Signed-off-by: Ye Li &lt;ye.li@nxp.com&gt;
Reviewed-by : Stefano Babic &lt;sbabic@denx.de&gt;
</content>
</entry>
<entry>
<title>gpio: Add driver for TI PCF8575 I2C GPIO expander</title>
<updated>2016-08-08T17:32:53Z</updated>
<author>
<name>Vignesh R</name>
<email>vigneshr@ti.com</email>
</author>
<published>2016-08-02T04:44:24Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=5746b0df9c09fe5e16412118d1977b5d7cb5fed5'/>
<id>urn:sha1:5746b0df9c09fe5e16412118d1977b5d7cb5fed5</id>
<content type='text'>
TI's PCF8575 is a 16-bit I2C GPIO expander.The device features a
16-bit quasi-bidirectional I/O ports. Each quasi-bidirectional I/O can
be used as an input or output without the use of a data-direction
control signal. The I/Os should be high before being used as inputs.
Read the device documentation for more details[1].

This driver is based on pcf857x driver available in Linux v4.7 kernel.
It supports basic reading and writing of gpio pins.

[1] http://www.ti.com/lit/ds/symlink/pcf8575.pdf

Signed-off-by: Vignesh R &lt;vigneshr@ti.com&gt;
Reviewed-by: Tom Rini &lt;trini@konsulko.com&gt;
Reviewed-by: Simon Glass &lt;sjg@chromium.org&gt;
Reviewed-by: Mugunthan V N &lt;mugunthanvnm@ti.com&gt;
</content>
</entry>
<entry>
<title>Merge branch 'master' of git://git.denx.de/u-boot-mpc85xx</title>
<updated>2016-06-04T16:12:26Z</updated>
<author>
<name>Tom Rini</name>
<email>trini@konsulko.com</email>
</author>
<published>2016-06-04T16:12:26Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=cc749523ae1adec3856f2b7fe77a6d856da4652a'/>
<id>urn:sha1:cc749523ae1adec3856f2b7fe77a6d856da4652a</id>
<content type='text'>
</content>
</entry>
<entry>
<title>dm: gpio: Add driver for MPC85XX GPIO controller</title>
<updated>2016-06-04T05:13:24Z</updated>
<author>
<name>mario.six@gdsys.cc</name>
<email>mario.six@gdsys.cc</email>
</author>
<published>2016-05-25T13:15:20Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=07d31f8f98fb350776c78a681ef27fd8ee288acd'/>
<id>urn:sha1:07d31f8f98fb350776c78a681ef27fd8ee288acd</id>
<content type='text'>
This patch adds a driver for the built-in GPIO controller of the MPC85XX
SoC (probably supporting other PowerQUICC III SoCs as well).

Each GPIO bank is identified by its own entry in the device tree, i.e.

gpio-controller@fc00 {
      #gpio-cells = &lt;2&gt;;
      compatible = "fsl,pq3-gpio";
      reg = &lt;0xfc00 0x100&gt;
}

By default, each bank is assumed to have 32 GPIOs, but the ngpios
setting is honored, so the number of GPIOs for each bank in configurable
to match the actual GPIO count of the SoC (e.g. the 32/32/23 banks of
the P1022 SoC).

The usual functions of GPIO drivers (setting input/output mode and output
value setting) are supported.

The driver has been tested on MPC85XX, but it is likely that other
PowerQUICC III devices will work as well.

Signed-off-by: Mario Six &lt;mario.six@gdsys.cc&gt;
Reviewed-by: Simon Glass &lt;sjg@chromium.org&gt;
Reviewed-by: York Sun &lt;york.sun@nxp.com&gt;
</content>
</entry>
</feed>
