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<title>u-boot.git/drivers/gpio, branch v2013.01</title>
<subtitle>Unnamed repository; edit this file 'description' to name the repository.
</subtitle>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/'/>
<entry>
<title>Merge branch 'u-boot-ti/master' into 'u-boot-arm/master'</title>
<updated>2013-01-08T12:15:45+00:00</updated>
<author>
<name>Albert ARIBAUD</name>
<email>albert.u.boot@aribaud.net</email>
</author>
<published>2013-01-08T12:15:45+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=79f38777947ac7685e2cef8bd977f954ab198c0e'/>
<id>79f38777947ac7685e2cef8bd977f954ab198c0e</id>
<content type='text'>
This required manual merging drivers/mtd/nand/Makefile
and adding am335x_evm support for CONFIG_SPL_NAND_DRIVERS
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<pre>
This required manual merging drivers/mtd/nand/Makefile
and adding am335x_evm support for CONFIG_SPL_NAND_DRIVERS
</pre>
</div>
</content>
</entry>
<entry>
<title>gpio: add gpio_is_valid() to omap_gpio API</title>
<updated>2012-12-10T19:45:35+00:00</updated>
<author>
<name>Nikita Kiryanov</name>
<email>nikita@compulab.co.il</email>
</author>
<published>2012-11-27T22:40:57+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=dcee1ab3207327f142635b08e834af5e9f9f8cc9'/>
<id>dcee1ab3207327f142635b08e834af5e9f9f8cc9</id>
<content type='text'>
Add gpio_is_valid() to omap_gpio API

Signed-off-by: Nikita Kiryanov &lt;nikita@compulab.co.il&gt;
Signed-off-by: Igor Grinberg &lt;grinberg@compulab.co.il&gt;
</content>
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<pre>
Add gpio_is_valid() to omap_gpio API

Signed-off-by: Nikita Kiryanov &lt;nikita@compulab.co.il&gt;
Signed-off-by: Igor Grinberg &lt;grinberg@compulab.co.il&gt;
</pre>
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</content>
</entry>
<entry>
<title>Merge branch 'master' of git://git.denx.de/u-boot into resolve</title>
<updated>2012-12-10T05:13:27+00:00</updated>
<author>
<name>Minkyu Kang</name>
<email>mk7.kang@samsung.com</email>
</author>
<published>2012-12-10T04:44:41+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=2c601c7208713ba9b2158c57adcf515f4bdbc212'/>
<id>2c601c7208713ba9b2158c57adcf515f4bdbc212</id>
<content type='text'>
Conflicts:
	README
	board/samsung/universal_c210/universal.c
	drivers/misc/Makefile
	drivers/power/power_fsl.c
	include/configs/mx35pdk.h
	include/configs/mx53loco.h
	include/configs/seaboard.h
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<pre>
Conflicts:
	README
	board/samsung/universal_c210/universal.c
	drivers/misc/Makefile
	drivers/power/power_fsl.c
	include/configs/mx35pdk.h
	include/configs/mx53loco.h
	include/configs/seaboard.h
</pre>
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</content>
</entry>
<entry>
<title>x86: gpio: Add additional GPIO banks to the ICH6 driver</title>
<updated>2012-12-06T22:30:38+00:00</updated>
<author>
<name>Bill Richardson</name>
<email>wfrichar@chromium.org</email>
</author>
<published>2012-10-20T11:44:36+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=57be9172fc87fa156973faadb7b74c36ae5c52e7'/>
<id>57be9172fc87fa156973faadb7b74c36ae5c52e7</id>
<content type='text'>
We can generally trust the ICH to have GPIO Bank 0 (the first 32 pins) in the
same place across all versions. This change adds two more banks, for up to
96 GPIOS.

BUT:
- Not all chipsets have the same number of GPIOs
- Not all chipsets have the same number of GPIO banks
- Not all chipsets put the additional banks at the same offset from GPIOBASE
- There so many chipset variants that it's pretty much impossible to support
  them all, or even keep track of the new ones.

So, although this adds suppport for the additional banks that seem to work
for the particular variants of CougarPoint Mobile chipsets that we've tried,
there's no chance it will support everything Intel produces. Good luck.

Signed-off-by: Bill Richardson &lt;wfrichar@chromium.org&gt;
Signed-off-by: Simon Glass &lt;sjg@chromium.org&gt;
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<pre>
We can generally trust the ICH to have GPIO Bank 0 (the first 32 pins) in the
same place across all versions. This change adds two more banks, for up to
96 GPIOS.

BUT:
- Not all chipsets have the same number of GPIOs
- Not all chipsets have the same number of GPIO banks
- Not all chipsets put the additional banks at the same offset from GPIOBASE
- There so many chipset variants that it's pretty much impossible to support
  them all, or even keep track of the new ones.

So, although this adds suppport for the additional banks that seem to work
for the particular variants of CougarPoint Mobile chipsets that we've tried,
there's no chance it will support everything Intel produces. Good luck.

Signed-off-by: Bill Richardson &lt;wfrichar@chromium.org&gt;
Signed-off-by: Simon Glass &lt;sjg@chromium.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>x86: gpio: Add GPIO driver for Intel ICH6 and later.</title>
<updated>2012-12-06T22:30:38+00:00</updated>
<author>
<name>Bill Richardson</name>
<email>wfrichar@chromium.org</email>
</author>
<published>2012-10-20T11:44:34+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=55ae10f8dbdf306e210240937ee4d558c8590447'/>
<id>55ae10f8dbdf306e210240937ee4d558c8590447</id>
<content type='text'>
Implement &lt;asm-generic/gpio.h&gt; functions for Intel ICH6 and later.
Only GPIOs 0-31 are handled by this code.

Signed-off-by: Bill Richardson &lt;wfrichar@chromium.org&gt;

Signed-off-by: Simon Glass &lt;sjg@chromium.org&gt;
</content>
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<pre>
Implement &lt;asm-generic/gpio.h&gt; functions for Intel ICH6 and later.
Only GPIOs 0-31 are handled by this code.

Signed-off-by: Bill Richardson &lt;wfrichar@chromium.org&gt;

Signed-off-by: Simon Glass &lt;sjg@chromium.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>gpio:fix: Proper handling of GPIO subsystem parts at Samsung devices</title>
<updated>2012-11-15T12:08:18+00:00</updated>
<author>
<name>Łukasz Majewski</name>
<email>l.majewski@samsung.com</email>
</author>
<published>2012-09-04T21:47:46+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=822593f02890f10e08c39ed82f926c9a80f7d533'/>
<id>822593f02890f10e08c39ed82f926c9a80f7d533</id>
<content type='text'>
Now proper GPIO parts numbering is handled at Samsung devices.
This fix is necessary for code using GPIO located at other banks
than first.

Test HW:
- Exynos4210 - Trats
- S5PC110 - goni

Signed-off-by: Lukasz Majewski &lt;l.majewski@samsung.com&gt;
Signed-off-by: Kyungmin Park &lt;kyungmin.park@samsung.com&gt;
Signed-off-by: Minkyu Kang &lt;mk7.kang@samsung.com&gt;
</content>
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<pre>
Now proper GPIO parts numbering is handled at Samsung devices.
This fix is necessary for code using GPIO located at other banks
than first.

Test HW:
- Exynos4210 - Trats
- S5PC110 - goni

Signed-off-by: Lukasz Majewski &lt;l.majewski@samsung.com&gt;
Signed-off-by: Kyungmin Park &lt;kyungmin.park@samsung.com&gt;
Signed-off-by: Minkyu Kang &lt;mk7.kang@samsung.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>mx6: use CONFIG_MX6 instead of CONFIG_MX6Q</title>
<updated>2012-11-10T07:15:40+00:00</updated>
<author>
<name>Troy Kisky</name>
<email>troy.kisky@boundarydevices.com</email>
</author>
<published>2012-10-23T10:57:47+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=5ea6d7c8fc05ad73d930a6fdb430188ff17a70e5'/>
<id>5ea6d7c8fc05ad73d930a6fdb430188ff17a70e5</id>
<content type='text'>
Use CONFIG_MX6 when the particular processor
variant isn't important.

Reserve the use of CONFIG_MX6Q to
specifically test for quad cores variant.

Signed-off-by: Troy Kisky &lt;troy.kisky@boundarydevices.com&gt;
</content>
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<pre>
Use CONFIG_MX6 when the particular processor
variant isn't important.

Reserve the use of CONFIG_MX6Q to
specifically test for quad cores variant.

Signed-off-by: Troy Kisky &lt;troy.kisky@boundarydevices.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>drivers/gpio/mpc83xx_gpio.c: sparse fixes</title>
<updated>2012-11-04T18:00:37+00:00</updated>
<author>
<name>Kim Phillips</name>
<email>kim.phillips@freescale.com</email>
</author>
<published>2012-10-29T13:34:41+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=8121d3c5ccc2cb552ddcf7eba7be5e1196232e1c'/>
<id>8121d3c5ccc2cb552ddcf7eba7be5e1196232e1c</id>
<content type='text'>
mpc83xx_gpio.c:166:26: warning: non-ANSI function declaration of function 'mpc83xx_gpio_init_f'
mpc83xx_gpio.c:190:26: warning: non-ANSI function declaration of function 'mpc83xx_gpio_init_r'

Signed-off-by: Kim Phillips &lt;kim.phillips@freescale.com&gt;
</content>
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<pre>
mpc83xx_gpio.c:166:26: warning: non-ANSI function declaration of function 'mpc83xx_gpio_init_f'
mpc83xx_gpio.c:190:26: warning: non-ANSI function declaration of function 'mpc83xx_gpio_init_r'

Signed-off-by: Kim Phillips &lt;kim.phillips@freescale.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>Tegra20: Move some include files to arch-tegra for sharing with Tegra30</title>
<updated>2012-10-15T18:54:06+00:00</updated>
<author>
<name>Tom Warren</name>
<email>twarren@nvidia.com</email>
</author>
<published>2012-09-19T22:50:56+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=150c24936b70ce36e11069038ba8e955704cab3a'/>
<id>150c24936b70ce36e11069038ba8e955704cab3a</id>
<content type='text'>
The move is pretty straight-forward. ap20.h and tegra20.h were renamed to ap.h and tegra.h.
Some files remain in arch-tegra20 but 'include' a file in 'arch-tegra' with #defines &amp; structs
that will be common between T20 and T30 HW. HW-specific #defines, etc. stay in the 'arch-tegra20'
'root' file.

All boards build OK w/MAKEALL -s tegra20. Checkpatch.pl runs clean. Seaboard works OK.

Signed-off-by: Tom Warren &lt;twarren@nvidia.com&gt;
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<pre>
The move is pretty straight-forward. ap20.h and tegra20.h were renamed to ap.h and tegra.h.
Some files remain in arch-tegra20 but 'include' a file in 'arch-tegra' with #defines &amp; structs
that will be common between T20 and T30 HW. HW-specific #defines, etc. stay in the 'arch-tegra20'
'root' file.

All boards build OK w/MAKEALL -s tegra20. Checkpatch.pl runs clean. Seaboard works OK.

Signed-off-by: Tom Warren &lt;twarren@nvidia.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>GPIO: pca953x: fix error reporting</title>
<updated>2012-10-08T18:12:07+00:00</updated>
<author>
<name>Laurence Withers</name>
<email>lwithers@guralp.com</email>
</author>
<published>2012-07-25T03:55:48+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=633efe9c2356be452ab79e964e3a83d78648a62c'/>
<id>633efe9c2356be452ab79e964e3a83d78648a62c</id>
<content type='text'>
Use the standard CMD_RET_* constants to clearly report errors from the
pca953x command. In addition, print error messages when I2C communication
fails.

Signed-off-by: Laurence Withers &lt;lwithers@guralp.com&gt;
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<pre>
Use the standard CMD_RET_* constants to clearly report errors from the
pca953x command. In addition, print error messages when I2C communication
fails.

Signed-off-by: Laurence Withers &lt;lwithers@guralp.com&gt;
</pre>
</div>
</content>
</entry>
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