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<title>u-boot.git/drivers/gpio, branch v2016.07</title>
<subtitle>Unnamed repository; edit this file 'description' to name the repository.
</subtitle>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/'/>
<entry>
<title>gpio: pca953x: Fix register reading past 8th GPIO</title>
<updated>2016-06-19T23:05:55+00:00</updated>
<author>
<name>mario.six@gdsys.cc</name>
<email>mario.six@gdsys.cc</email>
</author>
<published>2016-05-23T07:54:56+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=fc76b698736efa9d52e06aa09c03dc8ef10fd581'/>
<id>fc76b698736efa9d52e06aa09c03dc8ef10fd581</id>
<content type='text'>
A bug in the pca953x driver prevents correct reading of GPIO input
values beyond the 8th GPIO; all values are reported as zero. Setting of
GPIO output values is not affected.

This patch fixes the reading behavior.

Signed-off-by: Mario Six &lt;mario.six@gdsys.cc&gt;
Reviewed-by: Peng Fan &lt;van.freenix@gmail.com&gt;
Acked-by: Simon Glass &lt;sjg@chromium.org&gt;
</content>
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<pre>
A bug in the pca953x driver prevents correct reading of GPIO input
values beyond the 8th GPIO; all values are reported as zero. Setting of
GPIO output values is not affected.

This patch fixes the reading behavior.

Signed-off-by: Mario Six &lt;mario.six@gdsys.cc&gt;
Reviewed-by: Peng Fan &lt;van.freenix@gmail.com&gt;
Acked-by: Simon Glass &lt;sjg@chromium.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>Merge branch 'master' of git://git.denx.de/u-boot-atmel</title>
<updated>2016-06-13T12:50:58+00:00</updated>
<author>
<name>Tom Rini</name>
<email>trini@konsulko.com</email>
</author>
<published>2016-06-13T12:50:58+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=fd9102dafea5c6959401d0dbc5293a56d2261878'/>
<id>fd9102dafea5c6959401d0dbc5293a56d2261878</id>
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<pre>
</pre>
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</content>
</entry>
<entry>
<title>gpio: at91: Fix pullup/pulldown configuration on PIO3</title>
<updated>2016-06-12T21:49:38+00:00</updated>
<author>
<name>Marek Vasut</name>
<email>marex@denx.de</email>
</author>
<published>2016-05-04T21:05:23+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=152ac5fabf05daf6b0ae28f04d540b1e005c3ea1'/>
<id>152ac5fabf05daf6b0ae28f04d540b1e005c3ea1</id>
<content type='text'>
On systems with PIO3 (SAMA5D3/D4/..), the pullup and pulldown configuration
is mutualy exclusive. This patch assures that the opposite pull resistor gets
disabled before the requested pull resistor is enabled. This changes behavior
of at91_set_pio_pulldown() such that the pullup is only disabled if pulldown
is to be enabled. This changes behavior of at91_set_pio_pullup() such that
the pulldown is only disabled if pullup is to be enabled.

Signed-off-by: Marek Vasut &lt;marex@denx.de&gt;
Cc: Andreas Bießmann &lt;andreas.devel@googlemail.com&gt;
Cc: Josh Wu &lt;josh.wu@atmel.com&gt;
Cc: Simon Glass &lt;sjg@chromium.org&gt;
Reviewed-by: Andreas Bießmann &lt;andreas@biessmann.org&gt;
</content>
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<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
On systems with PIO3 (SAMA5D3/D4/..), the pullup and pulldown configuration
is mutualy exclusive. This patch assures that the opposite pull resistor gets
disabled before the requested pull resistor is enabled. This changes behavior
of at91_set_pio_pulldown() such that the pullup is only disabled if pulldown
is to be enabled. This changes behavior of at91_set_pio_pullup() such that
the pulldown is only disabled if pullup is to be enabled.

Signed-off-by: Marek Vasut &lt;marex@denx.de&gt;
Cc: Andreas Bießmann &lt;andreas.devel@googlemail.com&gt;
Cc: Josh Wu &lt;josh.wu@atmel.com&gt;
Cc: Simon Glass &lt;sjg@chromium.org&gt;
Reviewed-by: Andreas Bießmann &lt;andreas@biessmann.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>x86: broadwell: gpio: Remove the codes to set up pin control</title>
<updated>2016-06-12T04:19:35+00:00</updated>
<author>
<name>Bin Meng</name>
<email>bmeng.cn@gmail.com</email>
</author>
<published>2016-06-08T12:07:39+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=9769e05bcf79939bad23a719982dd1f85a110f3c'/>
<id>9769e05bcf79939bad23a719982dd1f85a110f3c</id>
<content type='text'>
Now that we have set up pin control in cpu_init_r(), remove the
duplicated codes in the broadwell gpio driver.

Signed-off-by: Bin Meng &lt;bmeng.cn@gmail.com&gt;
Reviewed-by: Stefan Roese &lt;sr@denx.de&gt;
Reviewed-by: Simon Glass &lt;sjg@chromium.org&gt;
</content>
<content type='xhtml'>
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<pre>
Now that we have set up pin control in cpu_init_r(), remove the
duplicated codes in the broadwell gpio driver.

Signed-off-by: Bin Meng &lt;bmeng.cn@gmail.com&gt;
Reviewed-by: Stefan Roese &lt;sr@denx.de&gt;
Reviewed-by: Simon Glass &lt;sjg@chromium.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>x86: Probe pinctrl driver in cpu_init_r()</title>
<updated>2016-06-12T04:19:35+00:00</updated>
<author>
<name>Bin Meng</name>
<email>bmeng.cn@gmail.com</email>
</author>
<published>2016-06-08T12:07:38+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=d8906c1f3fd9e437066a9de7ff2de306696a7598'/>
<id>d8906c1f3fd9e437066a9de7ff2de306696a7598</id>
<content type='text'>
At present pinctrl driver gets probed in ich6_gpio driver's probe
routine, which has two issues:

 - Pin's PADs only gets configured when GPIO driver is probed, which
   is not done by default. This leaves the board in a partially
   functional state as we must initialize PADs correctly to get
   perepherals fully working.
 - The probe routine of pinctrl driver is called multiple times, as
   normally there are multiple GPIO controllers. It should really
   be called just once.

Move the call to syscon_get_by_driver_data() from ich6_gpio driver
to cpu_init_r().

Signed-off-by: Bin Meng &lt;bmeng.cn@gmail.com&gt;
Reviewed-by: Stefan Roese &lt;sr@denx.de&gt;
Reviewed-by: Simon Glass &lt;sjg@chromium.org&gt;
Reviewed-by: George McCollister &lt;george.mccollister@gmail.com&gt;
Tested-by: George McCollister &lt;george.mccollister@gmail.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
At present pinctrl driver gets probed in ich6_gpio driver's probe
routine, which has two issues:

 - Pin's PADs only gets configured when GPIO driver is probed, which
   is not done by default. This leaves the board in a partially
   functional state as we must initialize PADs correctly to get
   perepherals fully working.
 - The probe routine of pinctrl driver is called multiple times, as
   normally there are multiple GPIO controllers. It should really
   be called just once.

Move the call to syscon_get_by_driver_data() from ich6_gpio driver
to cpu_init_r().

Signed-off-by: Bin Meng &lt;bmeng.cn@gmail.com&gt;
Reviewed-by: Stefan Roese &lt;sr@denx.de&gt;
Reviewed-by: Simon Glass &lt;sjg@chromium.org&gt;
Reviewed-by: George McCollister &lt;george.mccollister@gmail.com&gt;
Tested-by: George McCollister &lt;george.mccollister@gmail.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>x86: ich6_gpio: Output return value of syscon_get_by_driver_data()</title>
<updated>2016-06-12T04:19:35+00:00</updated>
<author>
<name>Bin Meng</name>
<email>bmeng.cn@gmail.com</email>
</author>
<published>2016-06-08T12:07:32+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=8142340ee3847c6422294fad0f1adc01c9d27e2b'/>
<id>8142340ee3847c6422294fad0f1adc01c9d27e2b</id>
<content type='text'>
The call to syscon_get_by_driver_data() does not save its return value.
Print it out to aid debugging.

Signed-off-by: Bin Meng &lt;bmeng.cn@gmail.com&gt;
Reviewed-by: Stefan Roese &lt;sr@denx.de&gt;
Reviewed-by: Simon Glass &lt;sjg@chromium.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
The call to syscon_get_by_driver_data() does not save its return value.
Print it out to aid debugging.

Signed-off-by: Bin Meng &lt;bmeng.cn@gmail.com&gt;
Reviewed-by: Stefan Roese &lt;sr@denx.de&gt;
Reviewed-by: Simon Glass &lt;sjg@chromium.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>Merge branch 'master' of git://git.denx.de/u-boot-mpc85xx</title>
<updated>2016-06-04T16:12:26+00:00</updated>
<author>
<name>Tom Rini</name>
<email>trini@konsulko.com</email>
</author>
<published>2016-06-04T16:12:26+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=cc749523ae1adec3856f2b7fe77a6d856da4652a'/>
<id>cc749523ae1adec3856f2b7fe77a6d856da4652a</id>
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<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
</pre>
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</content>
</entry>
<entry>
<title>dm: test: Add GPIO open drain tests</title>
<updated>2016-06-04T05:14:20+00:00</updated>
<author>
<name>mario.six@gdsys.cc</name>
<email>mario.six@gdsys.cc</email>
</author>
<published>2016-05-25T13:15:23+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=743268f5146e3fd93abb8b6142ef6a259a0656c5'/>
<id>743268f5146e3fd93abb8b6142ef6a259a0656c5</id>
<content type='text'>
Add some tests for the new open drain setting feature of the GPIO
uclass, and extend the capabilities of the sandbox GPIO driver
accordingly.

Signed-off-by: Mario Six &lt;mario.six@gdsys.cc&gt;
Reviewed-by: Simon Glass &lt;sjg@chromium.org&gt;
Reviewed-by: York Sun &lt;york.sun@nxp.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Add some tests for the new open drain setting feature of the GPIO
uclass, and extend the capabilities of the sandbox GPIO driver
accordingly.

Signed-off-by: Mario Six &lt;mario.six@gdsys.cc&gt;
Reviewed-by: Simon Glass &lt;sjg@chromium.org&gt;
Reviewed-by: York Sun &lt;york.sun@nxp.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>dm: gpio: Implement open drain for MPC85XX GPIO</title>
<updated>2016-06-04T05:14:12+00:00</updated>
<author>
<name>mario.six@gdsys.cc</name>
<email>mario.six@gdsys.cc</email>
</author>
<published>2016-05-25T13:15:22+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=51781783c59ad0080621d777579eb8acd14aa0ed'/>
<id>51781783c59ad0080621d777579eb8acd14aa0ed</id>
<content type='text'>
This patch implements the open-drain setting feature for the MPC85XX
GPIO controller.

Signed-off-by: Mario Six &lt;mario.six@gdsys.cc&gt;
Reviewed-by: Simon Glass &lt;sjg@chromium.org&gt;
Reviewed-by: York Sun &lt;york.sun@nxp.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
This patch implements the open-drain setting feature for the MPC85XX
GPIO controller.

Signed-off-by: Mario Six &lt;mario.six@gdsys.cc&gt;
Reviewed-by: Simon Glass &lt;sjg@chromium.org&gt;
Reviewed-by: York Sun &lt;york.sun@nxp.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>dm: gpio: Add methods for open drain setting</title>
<updated>2016-06-04T05:13:52+00:00</updated>
<author>
<name>mario.six@gdsys.cc</name>
<email>mario.six@gdsys.cc</email>
</author>
<published>2016-05-25T13:15:21+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=53ecdfb92034ce836ec94ba33ba0d8d27ea3c16c'/>
<id>53ecdfb92034ce836ec94ba33ba0d8d27ea3c16c</id>
<content type='text'>
Certain GPIO devices have the capability to switch their GPIOs into
open-drain mode, that is, instead of actively driving the output
(Push-pull output), the pin is connected to the collector (for a NPN
transistor) or the drain (for a MOSFET) of a transistor, respectively.
The pin then either forms an open circuit or a connection to ground,
depending on the state of the transistor.

This patch adds functions to the GPIO uclass to switch GPIOs to
open-drain mode on devices that support it.

Signed-off-by: Mario Six &lt;mario.six@gdsys.cc&gt;
Reviewed-by: Simon Glass &lt;sjg@chromium.org&gt;
Reviewed-by: York Sun &lt;york.sun@nxp.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Certain GPIO devices have the capability to switch their GPIOs into
open-drain mode, that is, instead of actively driving the output
(Push-pull output), the pin is connected to the collector (for a NPN
transistor) or the drain (for a MOSFET) of a transistor, respectively.
The pin then either forms an open circuit or a connection to ground,
depending on the state of the transistor.

This patch adds functions to the GPIO uclass to switch GPIOs to
open-drain mode on devices that support it.

Signed-off-by: Mario Six &lt;mario.six@gdsys.cc&gt;
Reviewed-by: Simon Glass &lt;sjg@chromium.org&gt;
Reviewed-by: York Sun &lt;york.sun@nxp.com&gt;
</pre>
</div>
</content>
</entry>
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