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<title>u-boot.git/drivers/gpio, branch v2017.05</title>
<subtitle>Unnamed repository; edit this file 'description' to name the repository.
</subtitle>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/'/>
<entry>
<title>gpio: sunxi: Add compatible string for R40 PIO</title>
<updated>2017-04-20T11:30:01+00:00</updated>
<author>
<name>Chen-Yu Tsai</name>
<email>wens@csie.org</email>
</author>
<published>2016-11-30T09:23:52+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=33559ffe5bc0ea10ae9956a0ac3fbd1cc30d23b8'/>
<id>33559ffe5bc0ea10ae9956a0ac3fbd1cc30d23b8</id>
<content type='text'>
The PIO on the R40 SoC is mostly compatible with the A20.
Only a few pin functions for mmc2 were added to the PC
pingroup, to support 8 bit eMMCs.

Signed-off-by: Chen-Yu Tsai &lt;wens@csie.org&gt;
Acked-by: Maxime Ripard &lt;maxime.ripard@free-electrons.com&gt;
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<pre>
The PIO on the R40 SoC is mostly compatible with the A20.
Only a few pin functions for mmc2 were added to the PC
pingroup, to support 8 bit eMMCs.

Signed-off-by: Chen-Yu Tsai &lt;wens@csie.org&gt;
Acked-by: Maxime Ripard &lt;maxime.ripard@free-electrons.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>gpio: at91_gpio: add the clock support</title>
<updated>2017-04-13T20:44:50+00:00</updated>
<author>
<name>Wenyou Yang</name>
<email>wenyou.yang@atmel.com</email>
</author>
<published>2017-03-23T04:46:21+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=f2f3c1576a5d4b15788843ab3353e6307fe380ba'/>
<id>f2f3c1576a5d4b15788843ab3353e6307fe380ba</id>
<content type='text'>
Add the clock support.

Signed-off-by: Wenyou Yang &lt;wenyou.yang@atmel.com&gt;
Reviewed-by: Simon Glass &lt;sjg@chromium.org&gt;
Reviewed-by: Andreas Bießmann &lt;andreas@biessmann.org&gt;
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<pre>
Add the clock support.

Signed-off-by: Wenyou Yang &lt;wenyou.yang@atmel.com&gt;
Reviewed-by: Simon Glass &lt;sjg@chromium.org&gt;
Reviewed-by: Andreas Bießmann &lt;andreas@biessmann.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>gpio: at91_gpio: add the device tree support</title>
<updated>2017-04-13T20:44:50+00:00</updated>
<author>
<name>Wenyou Yang</name>
<email>wenyou.yang@atmel.com</email>
</author>
<published>2017-03-23T04:46:20+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=cf468880c37be1a7fea0a842a14ba1e1e388147c'/>
<id>cf468880c37be1a7fea0a842a14ba1e1e388147c</id>
<content type='text'>
Add the device tree support.

Signed-off-by: Wenyou Yang &lt;wenyou.yang@atmel.com&gt;
Reviewed-by: Simon Glass &lt;sjg@chromium.org&gt;
Reviewed-by: Andreas Bießmann &lt;andreas@biessmann.org&gt;
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<pre>
Add the device tree support.

Signed-off-by: Wenyou Yang &lt;wenyou.yang@atmel.com&gt;
Reviewed-by: Simon Glass &lt;sjg@chromium.org&gt;
Reviewed-by: Andreas Bießmann &lt;andreas@biessmann.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>gpio: Kconfig: add CONFIG_AT91_GPIO option</title>
<updated>2017-04-13T20:44:50+00:00</updated>
<author>
<name>Wenyou Yang</name>
<email>wenyou.yang@atmel.com</email>
</author>
<published>2017-03-23T04:46:19+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=5a07a5f9224d792a27ac9894f86239bc7b3298ba'/>
<id>5a07a5f9224d792a27ac9894f86239bc7b3298ba</id>
<content type='text'>
The CONFIG_AT91_GPIO option is used to select AT91 PIO GPIO driver.

Signed-off-by: Wenyou Yang &lt;wenyou.yang@atmel.com&gt;
Reviewed-by: Simon Glass &lt;sjg@chromium.org&gt;
Reviewed-by: Andreas Bießmann &lt;andreas@biessmann.org&gt;
</content>
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<pre>
The CONFIG_AT91_GPIO option is used to select AT91 PIO GPIO driver.

Signed-off-by: Wenyou Yang &lt;wenyou.yang@atmel.com&gt;
Reviewed-by: Simon Glass &lt;sjg@chromium.org&gt;
Reviewed-by: Andreas Bießmann &lt;andreas@biessmann.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>gpio: at91_gpio: remove CPU_HAS_PIO3 macro</title>
<updated>2017-04-13T20:44:50+00:00</updated>
<author>
<name>Wenyou Yang</name>
<email>wenyou.yang@atmel.com</email>
</author>
<published>2017-03-23T04:44:36+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=2dc63f73678c18831efce3ec1a383375aa5423f1'/>
<id>2dc63f73678c18831efce3ec1a383375aa5423f1</id>
<content type='text'>
The intention of the removal is the preparation to introduce the
new AT91 PIO pinctrl driver.

Use the union to make the PIO3 and PIO2's registers be together
and make their offset aligned.

Signed-off-by: Wenyou Yang &lt;wenyou.yang@atmel.com&gt;
Reviewed-by: Simon Glass &lt;sjg@chromium.org&gt;
</content>
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<pre>
The intention of the removal is the preparation to introduce the
new AT91 PIO pinctrl driver.

Use the union to make the PIO3 and PIO2's registers be together
and make their offset aligned.

Signed-off-by: Wenyou Yang &lt;wenyou.yang@atmel.com&gt;
Reviewed-by: Simon Glass &lt;sjg@chromium.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>gpio: Add Rapid GPIO2P driver for i.MX7ULP</title>
<updated>2017-03-17T08:27:08+00:00</updated>
<author>
<name>Peng Fan</name>
<email>peng.fan@nxp.com</email>
</author>
<published>2017-02-22T08:21:45+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=d665eb6114c91f433473d4af8ff4e87e021b3ad8'/>
<id>d665eb6114c91f433473d4af8ff4e87e021b3ad8</id>
<content type='text'>
Add the imx_rgpio2p driver for Rapid GPIO2P controllers on i.MX7ULP.
Have added all ports on RGPIO2P_0 and RGPIO2P_1.

The configurations CONFIG_IMX_RGPIO2P and CONFIG_DM_GPIO must be set
to y to enable the drivers.

To use the GPIO function, the IBE and OBE needs to set in IOMUXC.
We did not set the bits in driver, but leave them to IOMUXC settings
of the GPIO pins. User should use IMX_GPIO_NR to generate the GPIO number
for gpio APIs access.

Signed-off-by: Peng Fan &lt;peng.fan@nxp.com&gt;
Signed-off-by: Ye Li &lt;ye.li@nxp.com&gt;
Reviewed-by : Stefano Babic &lt;sbabic@denx.de&gt;
</content>
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<pre>
Add the imx_rgpio2p driver for Rapid GPIO2P controllers on i.MX7ULP.
Have added all ports on RGPIO2P_0 and RGPIO2P_1.

The configurations CONFIG_IMX_RGPIO2P and CONFIG_DM_GPIO must be set
to y to enable the drivers.

To use the GPIO function, the IBE and OBE needs to set in IOMUXC.
We did not set the bits in driver, but leave them to IOMUXC settings
of the GPIO pins. User should use IMX_GPIO_NR to generate the GPIO number
for gpio APIs access.

Signed-off-by: Peng Fan &lt;peng.fan@nxp.com&gt;
Signed-off-by: Ye Li &lt;ye.li@nxp.com&gt;
Reviewed-by : Stefano Babic &lt;sbabic@denx.de&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>Merge git://git.denx.de/u-boot-dm</title>
<updated>2017-02-08T21:24:44+00:00</updated>
<author>
<name>Tom Rini</name>
<email>trini@konsulko.com</email>
</author>
<published>2017-02-08T21:24:44+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=21342d4aed6c77a4aa7a5b2579b3c23e21aea31a'/>
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<pre>
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</entry>
<entry>
<title>GPIO: Correct doc typo "confguration" -&gt; "configuration"</title>
<updated>2017-02-08T21:24:29+00:00</updated>
<author>
<name>Robert P. J. Day</name>
<email>rpjday@crashcourse.ca</email>
</author>
<published>2017-02-06T12:11:41+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=7582ddce132390fba10822c5977cd1ab532bb1eb'/>
<id>7582ddce132390fba10822c5977cd1ab532bb1eb</id>
<content type='text'>
Signed-off-by: Robert P. J. Day &lt;rpjday@crashcourse.ca&gt;
</content>
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<pre>
Signed-off-by: Robert P. J. Day &lt;rpjday@crashcourse.ca&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>dm: core: Replace of_offset with accessor</title>
<updated>2017-02-08T13:12:14+00:00</updated>
<author>
<name>Simon Glass</name>
<email>sjg@chromium.org</email>
</author>
<published>2017-01-17T23:52:55+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=e160f7d430f163bc42757aff3bf2bcac0a459f02'/>
<id>e160f7d430f163bc42757aff3bf2bcac0a459f02</id>
<content type='text'>
At present devices use a simple integer offset to record the device tree
node associated with the device. In preparation for supporting a live
device tree, which uses a node pointer instead, refactor existing code to
access this field through an inline function.

Signed-off-by: Simon Glass &lt;sjg@chromium.org&gt;
</content>
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<pre>
At present devices use a simple integer offset to record the device tree
node associated with the device. In preparation for supporting a live
device tree, which uses a node pointer instead, refactor existing code to
access this field through an inline function.

Signed-off-by: Simon Glass &lt;sjg@chromium.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>Update Maintainer and Author's email address</title>
<updated>2016-12-27T16:24:17+00:00</updated>
<author>
<name>Ajay Bhargav</name>
<email>contact@8051projects.net</email>
</author>
<published>2016-12-21T07:58:06+00:00</published>
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<id>c7c47ca246205ca9c534230b0278507488c5cec3</id>
<content type='text'>
I am not longer using my old email address
"ajay.bhargav@einfochips.com". For U-Boot development email address is
now updated to contact@8051projects.net

Signed-off-by: Ajay Bhargav &lt;contact@8051projects.net&gt;
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<pre>
I am not longer using my old email address
"ajay.bhargav@einfochips.com". For U-Boot development email address is
now updated to contact@8051projects.net

Signed-off-by: Ajay Bhargav &lt;contact@8051projects.net&gt;
</pre>
</div>
</content>
</entry>
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