u-boot.git/drivers/gpio, branch v2020.01 Unnamed repository; edit this file 'description' to name the repository. gpio: at91_gpio: Add bank names 2019-12-03T08:17:25+00:00 James Byrne james.byrne@origamienergy.com 2019-11-26T11:52:04+00:00 f3510e9754e1163e74e3606880b5698fcaa08a3a Make the at91_gpio driver set sensible GPIO bank names in the platform data. This makes the 'gpio status' command a lot more useful. Signed-off-by: James Byrne <james.byrne@origamienergy.com> Reviewed-by: Eugen Hristev <eugen.hristev@microchip.com> 
Make the at91_gpio driver set sensible GPIO bank names in the platform
data. This makes the 'gpio status' command a lot more useful.

Signed-off-by: James Byrne <james.byrne@origamienergy.com>
Reviewed-by: Eugen Hristev <eugen.hristev@microchip.com>
gpio: da8xx_gpio: Fix the _gpio_direction_output function 2019-10-30T21:48:47+00:00 Keerthy j-keerthy@ti.com 2019-10-24T08:22:28+00:00 3135022cb4db37ccf7691b03f6a99cfe6afb878d _gpio_direction_output function currently calls gpio_set_value with the wrong gpio number. gpio_set_value in the uclass driver expects a different gpio number and the _gpio_direction_output is currently providing the number specific to the bank. Hence fix it by calling the _gpio_set_value function instead. Reported-by: Faiz Abbas <faiz_abbas@ti.com> Fixes: 8e51c0f254 ("dm: gpio: Add DM compatibility to GPIO driver for Davinci") Signed-off-by: Keerthy <j-keerthy@ti.com> 
_gpio_direction_output function currently calls gpio_set_value
with the wrong gpio number. gpio_set_value in the uclass driver
expects a different gpio number and the _gpio_direction_output
is currently providing the number specific to the bank.

Hence fix it by calling the _gpio_set_value function instead.

Reported-by: Faiz Abbas <faiz_abbas@ti.com>
Fixes: 8e51c0f254 ("dm: gpio: Add DM compatibility to GPIO driver for Davinci")
Signed-off-by: Keerthy <j-keerthy@ti.com>
gpio: zynq: Add gpio driver support for PMC gpio 2019-10-24T11:37:01+00:00 Shubhrajyoti Datta shubhrajyoti.datta@xilinx.com 2019-09-18T06:40:31+00:00 98927daada2f0cdaadbb68144e7a4985dcc62926 This patch adds support for gpio driver for pmc gpio. Signed-off-by: Shubhrajyoti Datta <shubhrajyoti.datta@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> 
This patch adds support for gpio driver for pmc gpio.

Signed-off-by: Shubhrajyoti Datta <shubhrajyoti.datta@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
gpio: zynq: Add gpio driver support for Versal 2019-10-24T11:37:01+00:00 Ashok Reddy Soma ashok.reddy.soma@xilinx.com 2019-09-16T09:35:16+00:00 982485214f64e02f0eee8dfde05cf4e05aedfb97 This patch adds support for gpio driver for versal platform Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> 
This patch adds support for gpio driver for versal platform

Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
gpio: sifive: add support for DM based gpio driver for FU540-SoC 2019-10-18T01:04:01+00:00 Sagar Shrikant Kadam sagar.kadam@sifive.com 2019-10-01T17:00:46+00:00 d26b40450ba70dfc1c018c9dfc0b9b18c0465d9e This patch adds a DM based driver model for gpio controller present in FU540-C000 SoC on HiFive Unleashed A00 board. This SoC has one GPIO bank and 16 GPIO lines in total, out of which GPIO0 to GPIO9 and GPIO15 are routed to the J1 header on the board. This implementation is ported from linux based gpio driver submitted for review by Wesley W. Terpstra <wesley@sifive.com> and/or Atish Patra <atish.patra@wdc.com> (many thanks !!). The linux driver can be referred here [1] [1]: https://lkml.org/lkml/2018/10/9/1103 Signed-off-by: Sagar Shrikant Kadam <sagar.kadam@sifive.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> 
This patch adds a DM based driver model for gpio controller present in
FU540-C000 SoC on HiFive Unleashed A00 board. This SoC has one GPIO
bank and 16 GPIO lines in total, out of which GPIO0 to GPIO9 and
GPIO15 are routed to the J1 header on the board.

This implementation is ported from linux based gpio driver submitted
for review by Wesley W. Terpstra <wesley@sifive.com> and/or Atish Patra
<atish.patra@wdc.com> (many thanks !!). The linux driver can be referred
here [1]

[1]: https://lkml.org/lkml/2018/10/9/1103

Signed-off-by: Sagar Shrikant Kadam <sagar.kadam@sifive.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Merge tag 'xilinx-for-v2020.01' of https://gitlab.denx.de/u-boot/custodians/u-boot-microblaze 2019-10-09T20:22:03+00:00 Tom Rini trini@konsulko.com 2019-10-09T20:22:03+00:00 44fb0d6c9f5147a41c710032869e5e01b3c9e310 Xilinx/FPGA changes for v2020.01 FPGA: - Enable fpga loading on Versal - Minor fix Microblaze: - Fix LMB configurations to support initrds - Some other cleanups Zynq: - Minor config/dt changes - Add distro boot support for usb1 and mmc1 - Remove Xilinx private boot commands and use only distro boot ZynqMP: - Kconfig cleanups, defconfig updates - Update some dt files - Add firmware driver for talking to PMUFW - Extend distro boot support for jtag - Add new IDs - Add system controller configurations - Convert code to talk firmware via mailbox or SMCs Versal: - Add board_late_init() - Add run time DT memory setup - Add DFU support - Extend distro boot support for jtag and dfu - Add clock driver - Tune mini configurations Xilinx: - Improve documentation (boot scripts, dt binding) - Enable run time initrd_high calculation - Define default SYS_PROMPT - Add zynq/zynqmp virtual defconfig Drivers: - Add Xilinx mailbox driver for talking to firmware - Clean zynq_gem for Versal - Move ZYNQ_HISPD_BROKEN to Kconfig - Wire genphy_init() in phy.c - Add Xilinx gii2rgmii bridge - Cleanup zynq_sdhci - dwc3 fix - zynq_gpio fix - axi_emac fix Others: - apalis-tk1 - clean config file 
Xilinx/FPGA changes for v2020.01

FPGA:
- Enable fpga loading on Versal
- Minor fix

Microblaze:
- Fix LMB configurations to support initrds
- Some other cleanups

Zynq:
- Minor config/dt changes
- Add distro boot support for usb1 and mmc1
- Remove Xilinx private boot commands and use only distro boot

ZynqMP:
- Kconfig cleanups, defconfig updates
- Update some dt files
- Add firmware driver for talking to PMUFW
- Extend distro boot support for jtag
- Add new IDs
- Add system controller configurations
- Convert code to talk firmware via mailbox or SMCs

Versal:
- Add board_late_init()
- Add run time DT memory setup
- Add DFU support
- Extend distro boot support for jtag and dfu
- Add clock driver
- Tune mini configurations

Xilinx:
- Improve documentation (boot scripts, dt binding)
- Enable run time initrd_high calculation
- Define default SYS_PROMPT
- Add zynq/zynqmp virtual defconfig

Drivers:
- Add Xilinx mailbox driver for talking to firmware
- Clean zynq_gem for Versal
- Move ZYNQ_HISPD_BROKEN to Kconfig
- Wire genphy_init() in phy.c
- Add Xilinx gii2rgmii bridge
- Cleanup zynq_sdhci
- dwc3 fix
- zynq_gpio fix
- axi_emac fix

Others:
- apalis-tk1 - clean config file
Merge tag 'u-boot-imx-20191009' of https://gitlab.denx.de/u-boot/custodians/u-boot-imx 2019-10-09T15:44:45+00:00 Tom Rini trini@konsulko.com 2019-10-09T13:35:43+00:00 eaa0bde05186b1738d221bc5effc6f257a14e360 u-boot-imx-20191009 ------------------- Travis : https://travis-ci.org/sbabic/u-boot-imx/builds/595148532 - MX6UL / ULZ - Toradex board - Allow to set OCRAM for MX6Q/D - MX7ULP - MX8: (container image, imx8mq_mek), SCU API - fix several board booting from SD/EMMC (cubox-i for example) - pico boards [trini: display5 merged manually] Signed-off-by: Tom Rini <trini@konsulko.com> 
u-boot-imx-20191009
-------------------

Travis : https://travis-ci.org/sbabic/u-boot-imx/builds/595148532

- MX6UL / ULZ
- Toradex board
- Allow to set OCRAM for MX6Q/D
- MX7ULP
- MX8: (container image, imx8mq_mek), SCU API
- fix several board booting from SD/EMMC (cubox-i for example)
- pico boards

[trini: display5 merged manually]
Signed-off-by: Tom Rini <trini@konsulko.com>
spi: Add support for SPL_OF_PLATDATA to mxs_gpio.c driver 2019-10-08T14:36:36+00:00 Lukasz Majewski lukma@denx.de 2019-09-05T07:55:01+00:00 c883d6a0f408b0f319637a7e9b2d6099ada75a9f After this patch the mxs_gpio.c DM/DTS driver can be used at early SPL to read states of gpio pins (and for example alter the boot flow). It was necessary to adjust its name to 'fsl_imx_2{38}_gpio' to match requirements for SPL_OF_PLATDATA usage. Signed-off-by: Lukasz Majewski <lukma@denx.de> 
After this patch the mxs_gpio.c DM/DTS driver can be used at early SPL to
read states of gpio pins (and for example alter the boot flow).

It was necessary to adjust its name to 'fsl_imx_2{38}_gpio' to match
requirements for SPL_OF_PLATDATA usage.

Signed-off-by: Lukasz Majewski <lukma@denx.de>
gpio: zynq: fix issue in set gpio output direction 2019-10-08T07:53:04+00:00 Ashok Reddy Soma ashok.reddy.soma@xilinx.com 2019-09-11T10:40:11+00:00 0384ac058376aa2fbac9965e0f2a4ddb5729b37a This patch fixes zynq_gpio_direction() to call driver specific zynq_gpio_set_value function rather than top level gpio_set_value. Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> 
This patch fixes zynq_gpio_direction() to call driver specific
zynq_gpio_set_value function rather than top level gpio_set_value.

Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
spl: Allow tiny printf() to be controlled in SPL and TPL 2019-10-08T05:57:45+00:00 Simon Glass sjg@chromium.org 2019-09-25T14:56:27+00:00 27084c03d36a7f0e4d7c1679761e81567f1d5442 At present there is only one control for this and it is used for both SPL and TPL. But SPL might have a lot more space than TPL so the extra cost of a full printf() might be acceptable. Split the option into two, providing separate SPL and TPL controls. The TPL setting defaults to the same as SPL. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> 
At present there is only one control for this and it is used for both SPL
and TPL. But SPL might have a lot more space than TPL so the extra cost of
a full printf() might be acceptable.

Split the option into two, providing separate SPL and TPL controls. The
TPL setting defaults to the same as SPL.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>