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<title>u-boot.git/drivers/gpio, branch v2021.01</title>
<subtitle>Unnamed repository; edit this file 'description' to name the repository.</subtitle>
<id>http://cgit.235523.xyz/u-boot.git/atom/drivers/gpio?h=v2021.01</id>
<link rel='self' href='http://cgit.235523.xyz/u-boot.git/atom/drivers/gpio?h=v2021.01'/>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/'/>
<updated>2020-11-25T11:01:46Z</updated>
<entry>
<title>gpio: stm32: correct the bias management</title>
<updated>2020-11-25T11:01:46Z</updated>
<author>
<name>Patrick Delaunay</name>
<email>patrick.delaunay@st.com</email>
</author>
<published>2020-10-28T09:49:08Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=2c6df94c83425a2230b4bf676ba515525a13b3c8'/>
<id>urn:sha1:2c6df94c83425a2230b4bf676ba515525a13b3c8</id>
<content type='text'>
Use the bias configuration for all the GPIO configurations and not
only for input GPIO, as indicated in Reference manual
(Table 81. Port bit configuration table).

Fixes: 43efbb6a3ebf0223f9eab8d45916f602d876319f ("gpio: stm32: add ops get_dir_flags")
Fixes: f13ff88b61c32ac8f0e9068c41328b265ef619eb ("gpio: stm32: add ops set_dir_flags")
Signed-off-by: Patrick Delaunay &lt;patrick.delaunay@st.com&gt;
Reviewed-by: Patrice Chotard &lt;patrice.chotard@st.com&gt;
</content>
</entry>
<entry>
<title>sunxi: gpio: introduce compatible string for V3 GPIO</title>
<updated>2020-11-17T00:42:21Z</updated>
<author>
<name>Icenowy Zheng</name>
<email>icenowy@aosc.io</email>
</author>
<published>2020-10-26T14:18:01Z</published>
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<id>urn:sha1:889116bde65b22f7c31aea5e29bcad64ac218b42</id>
<content type='text'>
A new compatible string is introduced for V3 GPIO, because it has more
pins available than V3s.

Add the compatible string to the GPIO driver.

Signed-off-by: Icenowy Zheng &lt;icenowy@aosc.io&gt;
Reviewed-by: Jagan Teki &lt;jagan@amarulasolutions.com&gt;
</content>
</entry>
<entry>
<title>x86: Fix up driver names to avoid dtoc warnings</title>
<updated>2020-11-05T06:58:45Z</updated>
<author>
<name>Simon Glass</name>
<email>sjg@chromium.org</email>
</author>
<published>2020-10-05T11:27:01Z</published>
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<id>urn:sha1:9d20db0483d54b507472fc33ee0c8a71d6c71c85</id>
<content type='text'>
At present there are a lot of dtoc warnings reported when building
chromebook_coral, of the form:

   WARNING: the driver intel_apl_lpc was not found in the driver list

Correct these by using driver names that matches their compatible string.

Signed-off-by: Simon Glass &lt;sjg@chromium.org&gt;
Reviewed-by: Bin Meng &lt;bmeng.cn@gmail.com&gt;
</content>
</entry>
<entry>
<title>gpio: mpc8xxx: support fsl-layerscape platform</title>
<updated>2020-10-23T11:22:09Z</updated>
<author>
<name>hui.song</name>
<email>hui.song_1@nxp.com</email>
</author>
<published>2020-09-24T13:40:50Z</published>
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<id>urn:sha1:d5d6b548d950385cb66e1fa97ad5f6790bbca3ad</id>
<content type='text'>
Make the MPC8XXX gpio driver to support the fsl-layerscape.

Signed-off-by: hui.song &lt;hui.song_1@nxp.com&gt;
Reviewed-by: Priyanka Jain &lt;priyanka.jain@nxp.com&gt;
</content>
</entry>
<entry>
<title>arm: stm32: cleanup arch gpio.h</title>
<updated>2020-10-21T16:12:20Z</updated>
<author>
<name>Patrick Delaunay</name>
<email>patrick.delaunay@st.com</email>
</author>
<published>2020-10-02T12:08:54Z</published>
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<id>urn:sha1:6af78d03d394cb0b28716aaaf684ab99bdeb758d</id>
<content type='text'>
Cosmetic update of gpio.h:
- remove enumerate: stm32_gpio_port, stm32_gpio_pin
  because STM32_GPIO_XXX values are unused
- move STM32_GPIOS_PER_BANK in stm32_gpio.c
  as its value is IP dependent and not arch dependent

No functional change as number of banks and number of gpio by banks
is managed by device tree since since DM migration and
commit 8f651ca60ba1 ("pinctrl: stm32: Add get_pins_count() ops").

Signed-off-by: Patrick Delaunay &lt;patrick.delaunay@st.com&gt;
Reviewed-by: Patrice Chotard &lt;patrice.chotard@st.com&gt;
</content>
</entry>
<entry>
<title>drivers: gpio: keep output value for input on sandbox</title>
<updated>2020-10-14T15:16:34Z</updated>
<author>
<name>Heinrich Schuchardt</name>
<email>xypron.glpk@gmx.de</email>
</author>
<published>2020-09-14T10:50:55Z</published>
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<id>urn:sha1:7cd96a47281145aca4f9c8960a0a2e185b8bd70c</id>
<content type='text'>
For testing purposes keep the output value when switching to input.
This allows us to manipulate the input value via the gpio command.

Signed-off-by: Heinrich Schuchardt &lt;xypron.glpk@gmx.de&gt;
Reviewed-by: Philippe Reynes &lt;philippe.reynes@softathome.com&gt;
</content>
</entry>
<entry>
<title>gpio: dw: Return output value when direction is out</title>
<updated>2020-10-08T15:42:36Z</updated>
<author>
<name>Sean Anderson</name>
<email>seanga2@gmail.com</email>
</author>
<published>2020-09-14T15:02:01Z</published>
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<id>urn:sha1:b4167aa15ac13cbbd3948463d9d5f97fb98d2709</id>
<content type='text'>
dm_gpio_ops.get_value can be called when the gpio is either input or
output. The current dw code always returns the input value, which is
invalid if the direction is set to out.

Signed-off-by: Sean Anderson &lt;seanga2@gmail.com&gt;
Reviewed-by: Ley Foon Tan &lt;ley.foon.tan@intel.com&gt;
</content>
</entry>
<entry>
<title>gpio: dw: Add a trailing underscore to generated name</title>
<updated>2020-10-08T15:42:36Z</updated>
<author>
<name>Sean Anderson</name>
<email>seanga2@gmail.com</email>
</author>
<published>2020-09-14T15:02:00Z</published>
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<id>urn:sha1:18dbb7b335c2b4d14f2d72d77bdd60c6e5ebd25f</id>
<content type='text'>
Previously, if there was no bank-name property, it was easy to have
confusing gpio names like "gpio1@08", instead of "gpio1@0_8". This patch
follows the example of the sifive gpio driver.

Signed-off-by: Sean Anderson &lt;seanga2@gmail.com&gt;
Reviewed-by: Simon Glass &lt;sjg@chromium.org&gt;
</content>
</entry>
<entry>
<title>gpio: dw: Fix warnings about casting int to pointer</title>
<updated>2020-10-08T15:42:36Z</updated>
<author>
<name>Sean Anderson</name>
<email>seanga2@gmail.com</email>
</author>
<published>2020-09-14T15:01:59Z</published>
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<id>urn:sha1:af551daf9e0ab9c796015031beb02e5d62d29598</id>
<content type='text'>
Change the type of gpio_dwabp_platdata.base from fdt_addr_t to a void
pointer, since we pass it to readl.

Signed-off-by: Sean Anderson &lt;seanga2@gmail.com&gt;
Reviewed-by: Ley Foon Tan &lt;ley.foon.tan@intel.com&gt;
Reviewed-by: Bin Meng &lt;bmeng.cn@gmail.com&gt;
Reviewed-by: Simon Glass &lt;sjg@chromium.org&gt;
</content>
</entry>
<entry>
<title>Merge branch 'next'</title>
<updated>2020-10-05T18:10:59Z</updated>
<author>
<name>Tom Rini</name>
<email>trini@konsulko.com</email>
</author>
<published>2020-10-05T17:05:46Z</published>
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<id>urn:sha1:b7e7831e5d5be047f421ddc1f308afc22764a893</id>
<content type='text'>
Bring in the assorted changes that have been staged in the 'next' branch
prior to release.

Signed-off-by: Tom Rini &lt;trini@konsulko.com&gt;
</content>
</entry>
</feed>
