u-boot.git/drivers/gpio, branch v2024.01

tree-wide: Replace http:// link with https:// link for ti.com

2023-11-10T16:01:50+00:00

Replace instances of http://www.ti.com with https://www.ti.com

Signed-off-by: Nishanth Menon

gpio: rzg2l: Drop

2023-11-02T10:30:18+00:00

In line with changes elsewhere, drop inclusion of the common header.

Signed-off-by: Paul Barker

pinctrl: sunxi: add new D1 pinctrl support

2023-10-22T22:40:57+00:00

For the first time since at least the Allwinner A10 SoCs, the D1 (and
related cores) use a new pincontroller MMIO register layout, so we
cannot use our hardcoded, fixed offsets anymore.
Ideally this would all be handled by devicetree and DM drivers, but for
the DT-less SPL we still need the legacy interfaces.

Add a new Kconfig symbol to differenciate between the two generations of
pincontrollers, and just use that to just switch some basic symbols.
The rest is already abstracted enough, so works out of the box.

Signed-off-by: Andre Przywara 
Reviewed-by: Sam Edwards 
Tested-by: Sam Edwards 
Tested-by: Samuel Holland

pinctrl: sunxi: remove GPIO_EXTRA_HEADER

2023-10-22T22:40:57+00:00

U-Boot's generic GPIO_EXTRA_HEADER is a convenience symbol to allow code
to more easily include platform specific GPIO headers. This should not
be needed in a DM world anymore, since the generic GPIO framework
handles that nicely.
For Allwinner boards we still need to deal with non-DM GPIO in the SPL,
but this should become the exception, not the rule.

Make this more obvious by removing the definition of GPIO_EXTRA_HEADER,
and just force every legacy user of platform specific GPIO to include
the new sunxi_gpio.h header explicitly. Everyone doing so should feel
ashamed and should find a way to avoid it from now on.

Signed-off-by: Andre Przywara 
Tested-by: Samuel Holland

pinctrl: sunxi: remove struct sunxi_gpio

2023-10-22T22:40:57+00:00

So far every Allwinner SoC used the same basic pincontroller/GPIO
register frame, and just differed by the number of implemented banks and
pins, plus some special functionality from time to time. However the D1
and successors use a slightly different pinctrl register layout.
Use that opportunity to drop "struct sunxi_gpio", that described that
MMIO frame in a C struct. That approach is somewhat frowned upon in the
Linux world and rarely used there, though still popular with U-Boot.

Switching from a C struct to a "base address plus offset" approach allows
to switch between the two models more dynamically, without reverting to
preprocessor macros and #ifdef's.

Model the pinctrl MMIO register frame in the usual "base address +
offset" way, and replace a hard-to-parse CPP macro with a more readable
static function.
All the users get converted over. There are no functional changes at
this point, it just prepares the stages for the D1 and friends.

Signed-off-by: Andre Przywara 
Reviewed-by: Samuel Holland 
Tested-by: Samuel Holland

pinctrl: sunxi: add GPIO in/out wrappers

2023-10-22T22:40:56+00:00

So far we were open-coding the pincontroller's GPIO output/input access
in each function using that.

Provide functions that wrap that nicely, and follow the existing pattern
(set/get_{bank,}), so users don't need to know about the internals, and
we can abstract the new D1 pinctrl more easily.

Signed-off-by: Andre Przywara 
Reviewed-by: Samuel Holland

pinctrl: sunxi: move pinctrl code

2023-10-22T22:40:56+00:00

Move the existing sunxi-specific low level pinctrl routines from
arch/arm/mach-sunxi into the existing GPIO code under drivers/gpio, so
that the common code can be shared outside of arch/arm.

This also takes the opportunity to move some definitions from our
header file into the driver C file, as they are private to the driver
and are not needed elsewhere.

Signed-off-by: Andre Przywara 
Reviewed-by: Samuel Holland 
Tested-by: Samuel Holland

gpio: Add RZ/G2L GPIO driver

2023-10-16T13:46:18+00:00

This driver adds support for the gpio features of the GPIO/PFC module in
the Renesas RZ/G2L (R9A07G044) SoC.

The new `rzg2l-pfc-gpio` driver is bound to the same device tree node as
the `rzg2l-pfc-pinctrl` driver as the same hardware block provides both
GPIO and pin multiplexing features.

This patch is based on the corresponding Linux v6.5 driver
(commit 52e12027d50affbf60c6c9c64db8017391b0c22e).

Signed-off-by: Paul Barker 
Reviewed-by: Biju Das 
Reviewed-by: Lad Prabhakar 
Reviewed-by: Marek Vasut

treewide: use dev_read_addr_*_ptr() where appropriate

2023-10-13T20:01:42+00:00

A follow-up to commit 842fb5de424e
("drivers: use devfdt_get_addr_size_index_ptr when cast to pointer")
and commit 320a1938b6f7
("drivers: use devfdt_get_addr_index_ptr when cast to pointer").

In addition to using the *_ptr variants of these functions where the
address is cast to a pointer, this also changes devfdt_get_addr_*() to
dev_read_addr_*() in a few places. Some variable and field types are
changed from fdt_addr_t or phys_addr_t to void* where the cast was
happening later.

This patch fixes a number of compile warnings when building a 32bit
U-Boot with CONFIG_PHYS_64BIT=y. In some places, it also fixes error
handling where the return value of dev_read_addr() etc. was checked for
NULL instead of FDT_ADDR_T_NONE.

Signed-off-by: Matthias Schiffer 
Reviewed-by: Simon Glass

gpio: Remove unused NEEDS_MANUAL_RELOC code bits

2023-09-14T14:42:24+00:00

The last user of the NEEDS_MANUAL_RELOC has been removed in commit
26af162ac8f8 ("arch: m68k: Implement relocation")
Remove now unused NEEDS_MANUAL_RELOC code.

Signed-off-by: Marek Vasut