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<title>u-boot.git/drivers/i2c/Makefile, branch v2016.09</title>
<subtitle>Unnamed repository; edit this file 'description' to name the repository.
</subtitle>
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<entry>
<title>Merge branch 'master' of git://git.denx.de/u-boot-atmel</title>
<updated>2016-08-15T21:31:23+00:00</updated>
<author>
<name>Tom Rini</name>
<email>trini@konsulko.com</email>
</author>
<published>2016-08-15T21:31:23+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=0fcb9f07a1d086fc6951c08d2fc1cf6048bd54e2'/>
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<pre>
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</entry>
<entry>
<title>i2c: atmel: add i2c driver</title>
<updated>2016-08-15T20:12:00+00:00</updated>
<author>
<name>Songjun Wu</name>
<email>songjun.wu@atmel.com</email>
</author>
<published>2016-06-20T05:22:38+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=8800e0fa20c89df846559d85341c55439405cab6'/>
<id>8800e0fa20c89df846559d85341c55439405cab6</id>
<content type='text'>
Add i2c driver.

Signed-off-by: Songjun Wu &lt;songjun.wu@atmel.com&gt;
Reviewed-by: Heiko Schocher &lt;hs@denx.de&gt;
Acked-by: Heiko Schocher &lt;hs@denx.de&gt;
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<pre>
Add i2c driver.

Signed-off-by: Songjun Wu &lt;songjun.wu@atmel.com&gt;
Reviewed-by: Heiko Schocher &lt;hs@denx.de&gt;
Acked-by: Heiko Schocher &lt;hs@denx.de&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>i2c: add Tegra186 BPMP driver</title>
<updated>2016-08-15T17:26:13+00:00</updated>
<author>
<name>Stephen Warren</name>
<email>swarren@nvidia.com</email>
</author>
<published>2016-08-08T17:28:27+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=34f1c9fe14172b89141254522e73ebfb6493554e'/>
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<content type='text'>
On Tegra186, some I2C controllers are directly controlled by the main CPU,
whereas others are controlled by the BPMP, and can only be accessed by the
main CPU via IPC requests to the BPMP. This driver covers the latter case.

Signed-off-by: Stephen Warren &lt;swarren@nvidia.com&gt;
Reviewed-by: Simon Glass &lt;sjg@chromium.org&gt;
Reviewed-by: Heiko Schocher &lt;hs@denx.de&gt;
Signed-off-by: Tom Warren &lt;twarren@nvidia.com&gt;
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<pre>
On Tegra186, some I2C controllers are directly controlled by the main CPU,
whereas others are controlled by the BPMP, and can only be accessed by the
main CPU via IPC requests to the BPMP. This driver covers the latter case.

Signed-off-by: Stephen Warren &lt;swarren@nvidia.com&gt;
Reviewed-by: Simon Glass &lt;sjg@chromium.org&gt;
Reviewed-by: Heiko Schocher &lt;hs@denx.de&gt;
Signed-off-by: Tom Warren &lt;twarren@nvidia.com&gt;
</pre>
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</content>
</entry>
<entry>
<title>dm: i2c: Add driver for Cadence I2C IP</title>
<updated>2016-04-13T16:29:07+00:00</updated>
<author>
<name>Moritz Fischer</name>
<email>moritz.fischer@ettus.com</email>
</author>
<published>2015-12-28T17:47:11+00:00</published>
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<content type='text'>
This is a possible drop in replacement for drivers/i2c/zynq-i2c.c

Since this is cadence IP it has been renamed to cdns-i2c,
to make sense with the compatible string.

Signed-off-by: Moritz Fischer &lt;moritz.fischer@ettus.com&gt;
Reviewed-by: Heiko Schocher &lt;hs@denx.de&gt;
Signed-off-by: Michal Simek &lt;michal.simek@xilinx.com&gt;
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<pre>
This is a possible drop in replacement for drivers/i2c/zynq-i2c.c

Since this is cadence IP it has been renamed to cdns-i2c,
to make sense with the compatible string.

Signed-off-by: Moritz Fischer &lt;moritz.fischer@ettus.com&gt;
Reviewed-by: Heiko Schocher &lt;hs@denx.de&gt;
Signed-off-by: Michal Simek &lt;michal.simek@xilinx.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>x86: i2c: Add a stub driver for Intel I2C/SMbus</title>
<updated>2016-01-24T04:09:40+00:00</updated>
<author>
<name>Simon Glass</name>
<email>sjg@chromium.org</email>
</author>
<published>2016-01-17T23:11:44+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=abb0b01e7a22c4a1f3fdd2301fae7276e857b04b'/>
<id>abb0b01e7a22c4a1f3fdd2301fae7276e857b04b</id>
<content type='text'>
This is used on most Intel platforms. We don't have a driver for it yet, but
add a stub to handle the init. For now this targets ivybridge so we may want
to add a device tree binding and generalise it when other platforms are
supported.

Signed-off-by: Simon Glass &lt;sjg@chromium.org&gt;
Reviewed-by: Heiko Schocher &lt;hs@denx.de&gt;
Reviewed-by: Bin Meng &lt;bmeng.cn@gmail.com&gt;
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<pre>
This is used on most Intel platforms. We don't have a driver for it yet, but
add a stub to handle the init. For now this targets ivybridge so we may want
to add a device tree binding and generalise it when other platforms are
supported.

Signed-off-by: Simon Glass &lt;sjg@chromium.org&gt;
Reviewed-by: Heiko Schocher &lt;hs@denx.de&gt;
Reviewed-by: Bin Meng &lt;bmeng.cn@gmail.com&gt;
</pre>
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</content>
</entry>
<entry>
<title>dm: i2c: Allow muxes to be enabled for SPL separately</title>
<updated>2016-01-22T03:42:35+00:00</updated>
<author>
<name>Simon Glass</name>
<email>sjg@chromium.org</email>
</author>
<published>2016-01-22T02:43:53+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=4082fce92498a64e5e543ad53a1ed5a5c02a64d1'/>
<id>4082fce92498a64e5e543ad53a1ed5a5c02a64d1</id>
<content type='text'>
Since I2C muxes are seldom needed in SPL, and the code for this increases
the size somewhat, add a separate option to enable I2C muxes for SPL.

Signed-off-by: Simon Glass &lt;sjg@chromium.org&gt;
</content>
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<pre>
Since I2C muxes are seldom needed in SPL, and the code for this increases
the size somewhat, add a separate option to enable I2C muxes for SPL.

Signed-off-by: Simon Glass &lt;sjg@chromium.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>i2c, avr32: fix compiler warning "input is not relaxable"</title>
<updated>2015-11-23T13:47:48+00:00</updated>
<author>
<name>Heiko Schocher</name>
<email>hs@denx.de</email>
</author>
<published>2015-11-17T11:22:53+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=f300dccde433bf9e0223e1be489822fdc1cc83e2'/>
<id>f300dccde433bf9e0223e1be489822fdc1cc83e2</id>
<content type='text'>
compiling U-Boot for avr32 boards shows since
commit 3d1957f0ea01 "dm: i2c: Add support for multiplexed I2C buses"
this warning:

Building current source for 4 boards (4 threads, 8 jobs per thread)
     avr32:  +   atstk1002
+(atstk1002) drivers/i2c/built-in.o: warning: input is not relaxable
     avr32:  +   grasshopper
+(grasshopper) drivers/i2c/built-in.o: warning: input is not relaxable
     avr32:  +   atngw100
+(atngw100) drivers/i2c/built-in.o: warning: input is not relaxable
     avr32:  +   atngw100mkii
+(atngw100mkii) drivers/i2c/built-in.o: warning: input is not relaxable
    0    4    0 /4      0:00:16  : atngw100mkii

Fix it.

Signed-off-by: Heiko Schocher &lt;hs@denx.de&gt;
Reviewed-by: Roger Meier &lt;r.meier@siemens.com&gt;
Reviewed-by: Simon Glass &lt;sjg@chromium.org&gt;
Reviewed-by: Andreas Bießmann &lt;andreas.devel@googlemail.com&gt;
</content>
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<pre>
compiling U-Boot for avr32 boards shows since
commit 3d1957f0ea01 "dm: i2c: Add support for multiplexed I2C buses"
this warning:

Building current source for 4 boards (4 threads, 8 jobs per thread)
     avr32:  +   atstk1002
+(atstk1002) drivers/i2c/built-in.o: warning: input is not relaxable
     avr32:  +   grasshopper
+(grasshopper) drivers/i2c/built-in.o: warning: input is not relaxable
     avr32:  +   atngw100
+(atngw100) drivers/i2c/built-in.o: warning: input is not relaxable
     avr32:  +   atngw100mkii
+(atngw100mkii) drivers/i2c/built-in.o: warning: input is not relaxable
    0    4    0 /4      0:00:16  : atngw100mkii

Fix it.

Signed-off-by: Heiko Schocher &lt;hs@denx.de&gt;
Reviewed-by: Roger Meier &lt;r.meier@siemens.com&gt;
Reviewed-by: Simon Glass &lt;sjg@chromium.org&gt;
Reviewed-by: Andreas Bießmann &lt;andreas.devel@googlemail.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>arm: Remove unused ST-Ericsson u8500 arch</title>
<updated>2015-09-15T19:05:21+00:00</updated>
<author>
<name>Stefan Roese</name>
<email>sr@denx.de</email>
</author>
<published>2015-09-14T07:17:36+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=68282f55b8465660af105086ad327ecdd8f35c67'/>
<id>68282f55b8465660af105086ad327ecdd8f35c67</id>
<content type='text'>
This arch does not seem to be supported / used at all in the current
U-Boot mainline source tree any more. So lets remove the core u8500 code
and code that was only referenced by this platform.

Please note that this patch also removes these config options:

- CONFIG_PL011_SERIAL_RLCR
- CONFIG_PL011_SERIAL_FLUSH_ON_INIT

As they only seem to be referenced by u8500 based boards. Without any
such board in the current code, these config option don't make sense
any more. Lets remove them as well.

If someone still wants to use this platform, then please send patches
to re-enable support by adding at least one board that references this
code.

Signed-off-by: Stefan Roese &lt;sr@denx.de&gt;
Cc: Mathieu Poirier &lt;mathieu.poirier@linaro.org&gt;
Cc: John Rigby &lt;john.rigby@linaro.org&gt;
Cc: Simon Glass &lt;sjg@chromium.org&gt;
Cc: Masahiro Yamada &lt;yamada.masahiro@socionext.com&gt;
Cc: Tom Rini &lt;trini@konsulko.com&gt;
Cc: Heiko Schocher &lt;hs@denx.de&gt;
Cc: Albert Aribaud &lt;albert.u.boot@aribaud.net&gt;
Reviewed-by: Masahiro Yamada &lt;yamada.masahiro@socionext.com&gt;
</content>
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<pre>
This arch does not seem to be supported / used at all in the current
U-Boot mainline source tree any more. So lets remove the core u8500 code
and code that was only referenced by this platform.

Please note that this patch also removes these config options:

- CONFIG_PL011_SERIAL_RLCR
- CONFIG_PL011_SERIAL_FLUSH_ON_INIT

As they only seem to be referenced by u8500 based boards. Without any
such board in the current code, these config option don't make sense
any more. Lets remove them as well.

If someone still wants to use this platform, then please send patches
to re-enable support by adding at least one board that references this
code.

Signed-off-by: Stefan Roese &lt;sr@denx.de&gt;
Cc: Mathieu Poirier &lt;mathieu.poirier@linaro.org&gt;
Cc: John Rigby &lt;john.rigby@linaro.org&gt;
Cc: Simon Glass &lt;sjg@chromium.org&gt;
Cc: Masahiro Yamada &lt;yamada.masahiro@socionext.com&gt;
Cc: Tom Rini &lt;trini@konsulko.com&gt;
Cc: Heiko Schocher &lt;hs@denx.de&gt;
Cc: Albert Aribaud &lt;albert.u.boot@aribaud.net&gt;
Reviewed-by: Masahiro Yamada &lt;yamada.masahiro@socionext.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>rockchip: Add I2C driver</title>
<updated>2015-09-03T03:28:24+00:00</updated>
<author>
<name>Simon Glass</name>
<email>sjg@chromium.org</email>
</author>
<published>2015-08-30T22:55:39+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=3437469985df7c5403fa6e29b224e84c63bdbd52'/>
<id>3437469985df7c5403fa6e29b224e84c63bdbd52</id>
<content type='text'>
Add an I2C driver for the Rockchip RK3288, using driver model. It should work
for other Rockchip SoCs also.

Signed-off-by: Simon Glass &lt;sjg@chromium.org&gt;
</content>
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<pre>
Add an I2C driver for the Rockchip RK3288, using driver model. It should work
for other Rockchip SoCs also.

Signed-off-by: Simon Glass &lt;sjg@chromium.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>cros_ec: Support the LDO access method used by spring</title>
<updated>2015-08-06T03:06:11+00:00</updated>
<author>
<name>Simon Glass</name>
<email>sjg@chromium.org</email>
</author>
<published>2015-08-03T14:19:24+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=f48eaf01b2f7212987166aae970b895c7e215466'/>
<id>f48eaf01b2f7212987166aae970b895c7e215466</id>
<content type='text'>
Add a driver to support the special LDO access used by spring. This is a
custom method in the cros_ec protocol - it does not use an I2C
pass-through.

There are two implementation choices:

1. Write a special LDO driver which can talk across the EC. Duplicate all
the logic from TPS65090 for retrying when the LDO fails to come up.

2. Write a special I2C bus driver which pretends to be a TPS65090 and
transfers reads and writes using the LDO message.

Either is distasteful. The latter method is chosen since it results in less
code duplication and a fairly simple (30-line) implementation of the core
logic.

The crosec 'ldo' subcommand could be removed (since i2c md/mw will work
instead) but is retained as a convenience.

Signed-off-by: Simon Glass &lt;sjg@chromium.org&gt;
</content>
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<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Add a driver to support the special LDO access used by spring. This is a
custom method in the cros_ec protocol - it does not use an I2C
pass-through.

There are two implementation choices:

1. Write a special LDO driver which can talk across the EC. Duplicate all
the logic from TPS65090 for retrying when the LDO fails to come up.

2. Write a special I2C bus driver which pretends to be a TPS65090 and
transfers reads and writes using the LDO message.

Either is distasteful. The latter method is chosen since it results in less
code duplication and a fairly simple (30-line) implementation of the core
logic.

The crosec 'ldo' subcommand could be removed (since i2c md/mw will work
instead) but is retained as a convenience.

Signed-off-by: Simon Glass &lt;sjg@chromium.org&gt;
</pre>
</div>
</content>
</entry>
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