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<title>u-boot.git/drivers/i2c/Makefile, branch v2024.01</title>
<subtitle>Unnamed repository; edit this file 'description' to name the repository.</subtitle>
<id>http://cgit.235523.xyz/u-boot.git/atom/drivers/i2c/Makefile?h=v2024.01</id>
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<updated>2023-10-18T00:50:52Z</updated>
<entry>
<title>lib: acpi: Fix linking SPL when ACPIGEN is enabled</title>
<updated>2023-10-18T00:50:52Z</updated>
<author>
<name>Sean Anderson</name>
<email>seanga2@gmail.com</email>
</author>
<published>2023-10-14T20:47:47Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=841c4d608852a66615a66015b8ffe866e9354f77'/>
<id>urn:sha1:841c4d608852a66615a66015b8ffe866e9354f77</id>
<content type='text'>
lib/acpi/acpigen.o is only compiled into SPL when SPL_ACPIGEN is enabled.
Update several files which reference these functions accordingly.

Signed-off-by: Sean Anderson &lt;seanga2@gmail.com&gt;
Reviewed-by: Simon Glass &lt;sjg@chromium.org&gt;
</content>
</entry>
<entry>
<title>i2c: designware: Add Kconfig for designware_i2c_pci.c</title>
<updated>2023-08-02T03:02:32Z</updated>
<author>
<name>Minda Chen</name>
<email>minda.chen@starfivetech.com</email>
</author>
<published>2023-07-25T09:46:47Z</published>
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<id>urn:sha1:7eb62cb7165791a9a98a2d498f88b0ef2192f4c9</id>
<content type='text'>
As the Designware_i2c_pci.c uses ACPI APIs, If some SoCs (StarFive
JH7110) contain Designware i2c and PCI but do not use ACPI,
This file cannot be compiled. So add a new Kconfig for
designware_i2c_pci.c, which depends on ACPIGEN

Signed-off-by: Minda Chen &lt;minda.chen@starfivetech.com&gt;
Reviewed-by: Leo Yu-Chi Liang &lt;ycliang@andestech.com&gt;
</content>
</entry>
<entry>
<title>i2c:aspeed:support ast2600 i2c new register mode driver</title>
<updated>2023-02-13T08:57:49Z</updated>
<author>
<name>Ryan Chen</name>
<email>ryan_chen@aspeedtech.com</email>
</author>
<published>2023-01-30T06:19:24Z</published>
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<id>urn:sha1:4088f5fce86dd02194f38587fefaa86762897387</id>
<content type='text'>
Add i2c new register mode driver to support AST2600 i2c
new register mode. AST2600 i2c controller have legacy and
new register mode. The new register mode have global register
support 4 base clock for scl clock selection, and new clock
divider mode.

Signed-off-by: Ryan Chen &lt;ryan_chen@aspeedtech.com&gt;
Reviewed-by: Simon Glass &lt;sjg@chromium.org&gt;
Reviewed-by: Heiko Schocher &lt;hs@denx.de&gt;
</content>
</entry>
<entry>
<title>i2c: Add support for Qualcomm I2C driver</title>
<updated>2023-02-10T17:50:00Z</updated>
<author>
<name>Sumit Garg</name>
<email>sumit.garg@linaro.org</email>
</author>
<published>2023-02-01T13:59:00Z</published>
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<id>urn:sha1:9bdec960b216f777df8926f3a88da795c89ee39b</id>
<content type='text'>
Add support for Qualcomm I2C QUP driver which is inspired from
corresponding driver in Linux: drivers/i2c/busses/i2c-qup.c.

Currently this driver only support FIFO polling mode which is sufficient
to support devices like eeprom, rtc etc.

Co-developed-by: Mike Worsfold &lt;mworsfold@impinj.com&gt;
Signed-off-by: Mike Worsfold &lt;mworsfold@impinj.com&gt;
Signed-off-by: Sumit Garg &lt;sumit.garg@linaro.org&gt;
</content>
</entry>
<entry>
<title>sh4: Drop unused kona_i2c driver</title>
<updated>2023-02-07T19:33:49Z</updated>
<author>
<name>Simon Glass</name>
<email>sjg@chromium.org</email>
</author>
<published>2023-02-01T20:20:12Z</published>
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<id>urn:sha1:04c8b0da684b61c589e521a97f721f6d3fe7b530</id>
<content type='text'>
This is not used. Drop the driver and Kconfig option.

Signed-off-by: Simon Glass &lt;sjg@chromium.org&gt;
Reviewed-by: Heiko Schocher &lt;hs@denx.de&gt;
</content>
</entry>
<entry>
<title>i2c: add support for MediaTek I2C interface</title>
<updated>2022-09-23T19:09:15Z</updated>
<author>
<name>Weijie Gao</name>
<email>weijie.gao@mediatek.com</email>
</author>
<published>2022-09-09T11:59:48Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=9ad71f63401b2a12b34c5be4ad9d605385afcf0e'/>
<id>urn:sha1:9ad71f63401b2a12b34c5be4ad9d605385afcf0e</id>
<content type='text'>
This patch adds support for MediaTek I2C interface

Reviewed-by: Heiko Schocher &lt;hs@denx.de&gt;
Reviewed-by: Simon Glass &lt;sjg@chromium.org&gt;
Signed-off-by: Weijie Gao &lt;weijie.gao@mediatek.com&gt;
</content>
</entry>
<entry>
<title>i2c: nuvoton: Add NPCM7xx i2c driver</title>
<updated>2022-07-19T11:46:28Z</updated>
<author>
<name>Jim Liu</name>
<email>jim.t90615@gmail.com</email>
</author>
<published>2022-06-23T05:31:42Z</published>
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<id>urn:sha1:2b77eea7f309d969310f5d4c2d9639ffca2b5abf</id>
<content type='text'>
Add Nuvoton BMC NPCM750 i2c driver

Signed-off-by: Jim Liu &lt;JJLIU0@nuvoton.com&gt;
Reviewed-by: Heiko Schocher &lt;hs@denx.de&gt;
</content>
</entry>
<entry>
<title>i2c: Add Microchip PolarFire SoC I2C driver</title>
<updated>2021-12-02T08:43:51Z</updated>
<author>
<name>Padmarao Begari</name>
<email>padmarao.begari@microchip.com</email>
</author>
<published>2021-11-17T12:51:16Z</published>
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<id>urn:sha1:0dc0d1e094418634e414a03f37df400214a33e1f</id>
<content type='text'>
Add I2C driver code for the Microchip PolarFire SoC.
This driver supports I2C data transfer and probe for I2C
slave addresses.

Signed-off-by: Padmarao Begari &lt;padmarao.begari@microchip.com&gt;
Reviewed-by: Leo Yu-Chi Liang &lt;ycliang@andestech.com&gt;
</content>
</entry>
<entry>
<title>arm: mvebu: a3720: Create Kconfig option for I2C_MV</title>
<updated>2021-10-21T05:39:05Z</updated>
<author>
<name>Marek Behún</name>
<email>marek.behun@nic.cz</email>
</author>
<published>2021-10-09T17:33:37Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=999ac22b59045d643028d7e66c17504143127628'/>
<id>urn:sha1:999ac22b59045d643028d7e66c17504143127628</id>
<content type='text'>
Move the config option CONFIG_I2C_MV to a Kconfig option
CONFIG_SYS_I2C_MV and move the default definition from config header
files into defconfigs.

Signed-off-by: Marek Behún &lt;marek.behun@nic.cz&gt;
Reviewed-by: Stefan Roese &lt;sr@denx.de&gt;
</content>
</entry>
<entry>
<title>i2c: Add a DM_I2C driver for the sun8i RSB controller</title>
<updated>2021-10-12T09:19:18Z</updated>
<author>
<name>Samuel Holland</name>
<email>samuel@sholland.org</email>
</author>
<published>2021-10-08T05:17:21Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=3227c85fe76312290c3ec15a02dcba3f9c6bc399'/>
<id>urn:sha1:3227c85fe76312290c3ec15a02dcba3f9c6bc399</id>
<content type='text'>
This bus controller is used to communicate with an X-Powers AXP PMIC.
Currently, various drivers access PMIC registers through a platform-
specific non-DM "pmic_bus" interface, which depends on the legacy I2C
framework. In order to convert those drivers to use DM_PMIC, this bus
needs a DM_I2C driver.

Refactor the rsb functions to take the base address as a parameter,
and implement both the existing interface (which is still needed in
SPL) and the DM_I2C interface on top of them.

The register for switching between I2C/P2WI/RSB mode is the same across
all PMIC variants, so move that to the common header.

There are only a couple of pairs of hardware/runtime addresses used
across all PMIC variants. So far the code expected only the "primary"
pair, but some PMICs like the AXP305 and AXP805 use the secondary pair,
so add support for that to the DM driver as well.

Signed-off-by: Samuel Holland &lt;samuel@sholland.org&gt;
Reviewed-by: Andre Przywara &lt;andre.przywara@arm.com&gt;
Signed-off-by: Andre Przywara &lt;andre.przywara@arm.com&gt;
</content>
</entry>
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