u-boot.git/drivers/i2c, branch v2016.01-rc1 Unnamed repository; edit this file 'description' to name the repository. i2c: soft_i2c: Fix bus indizes 2015-11-12T23:04:12+00:00 Dirk Eibach dirk.eibach@gdsys.cc 2015-10-28T10:46:39+00:00 37b33254c2cf6e47f2aaf40946ed6c98ba1057ed Since busses are sorted in alphabetical order, introducing more than nine busses led to unexpected behaviour. Signed-off-by: Dirk Eibach <dirk.eibach@gdsys.cc> 
Since busses are sorted in alphabetical order, introducing more
than nine busses led to unexpected behaviour.

Signed-off-by: Dirk Eibach <dirk.eibach@gdsys.cc>
hrcon: Add fan controllers 2015-11-12T23:04:10+00:00 Dirk Eibach dirk.eibach@gdsys.cc 2015-10-28T10:46:36+00:00 5c3b6dc1fb415d316744b284513c908e96426567 Signed-off-by: Dirk Eibach <dirk.eibach@gdsys.cc> 
Signed-off-by: Dirk Eibach <dirk.eibach@gdsys.cc>
hrcon: Add support for the DH variant 2015-11-12T23:04:10+00:00 Dirk Eibach dirk.eibach@gdsys.cc 2015-10-28T10:46:35+00:00 7ed45d3d0a1deec19dd44d3590b779fc128ced8c hrcon DH(dual head) has two video outputs per FPGA. Signed-off-by: Dirk Eibach <dirk.eibach@gdsys.cc> 
hrcon DH(dual head) has two video outputs per FPGA.

Signed-off-by: Dirk Eibach <dirk.eibach@gdsys.cc>
i2c: ihs_i2c: Fix hold_bus control 2015-11-12T20:59:02+00:00 Dirk Eibach dirk.eibach@gdsys.cc 2015-10-28T10:46:24+00:00 457491565b7d33b73829d911976f87027f450daf Bus has to be held for repeated start regardless of read/write access. Signed-off-by: Dirk Eibach <dirk.eibach@gdsys.cc> Acked-by: Heiko Schocher <hs@denx.de> 
Bus has to be held for repeated start regardless of
read/write access.

Signed-off-by: Dirk Eibach <dirk.eibach@gdsys.cc>
Acked-by: Heiko Schocher <hs@denx.de>
i2c: ihs_i2c: Use macro bestpractices 2015-11-12T20:59:01+00:00 Dirk Eibach dirk.eibach@gdsys.cc 2015-10-28T10:46:23+00:00 3af0cdb137b5a94751913467615d7e961271a69c Reinhard Pfau complained that macros in ihs_i2c do not follow best practices. Signed-off-by: Dirk Eibach <dirk.eibach@gdsys.cc> Acked-by: Heiko Schocher <hs@denx.de> 
Reinhard Pfau complained that macros in ihs_i2c do not follow best practices.

Signed-off-by: Dirk Eibach <dirk.eibach@gdsys.cc>
Acked-by: Heiko Schocher <hs@denx.de>
i2c: ihs_i2c: Dual channel support 2015-11-12T20:59:01+00:00 Dirk Eibach dirk.eibach@gdsys.cc 2015-10-28T10:46:22+00:00 071be896947a2b6ab791657e250da6fc995360a8 Support two i2c masters per FPGA. Signed-off-by: Dirk Eibach <dirk.eibach@gdsys.cc> Acked-by: Heiko Schocher <hs@denx.de> 
Support two i2c masters per FPGA.

Signed-off-by: Dirk Eibach <dirk.eibach@gdsys.cc>
Acked-by: Heiko Schocher <hs@denx.de>
Merge branch 'master' of git://git.denx.de/u-boot-fsl-qoriq 2015-10-30T16:56:58+00:00 Tom Rini trini@konsulko.com 2015-10-30T16:56:58+00:00 588eec2a8603ee8a8e2e913895767c4c02d523af 






armv8/fsl_lsch3: Change arch to fsl-layerscape
2015-10-29T17:34:00+00:00

Mingkai Hu
Mingkai.Hu@freescale.com

2015-10-26T11:47:50+00:00

9f3183d2d69f6d392fb943d249934f8648531e7e

There are two LS series processors are built on ARMv8 Layersacpe
architecture currently, LS2085A and LS1043A. They are based on
ARMv8 core although use different chassis, so create fsl-layerscape
to refactor the common code for the LS series processors which also
paves the way for adding LS1043A platform.

Signed-off-by: Mingkai Hu <Mingkai.Hu@freescale.com>
Signed-off-by: Hou Zhiqiang <B48286@freescale.com>
Signed-off-by: Gong Qianyu <Qianyu.Gong@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>





There are two LS series processors are built on ARMv8 Layersacpe
architecture currently, LS2085A and LS1043A. They are based on
ARMv8 core although use different chassis, so create fsl-layerscape
to refactor the common code for the LS series processors which also
paves the way for adding LS1043A platform.

Signed-off-by: Mingkai Hu <Mingkai.Hu@freescale.com>
Signed-off-by: Hou Zhiqiang <B48286@freescale.com>
Signed-off-by: Gong Qianyu <Qianyu.Gong@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>







i2c: Instantiate I2C controllers when selected
2015-10-28T08:53:49+00:00

Michal Simek
michal.simek@xilinx.com

2015-10-27T15:02:36+00:00

009902a871dcb1ad60e746280372f47d90f65353

Do not enable both I2C controllers by default. Enable them only when
they are selected.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Heiko Schocher <hs@denx.de>





Do not enable both I2C controllers by default. Enable them only when
they are selected.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Heiko Schocher <hs@denx.de>







I2C: mxc_i2c: make I2C1 and I2C2 optional
2015-10-02T08:42:31+00:00

Albert ARIBAUD \\(3ADEV\\)
albert.aribaud@3adev.fr

2015-09-21T20:43:38+00:00

03544c6640e8a969f8409eac637f4780e1eabb1d

The driver assumed that I2C1 and I2C2 were always enabled,
and if they were not, then an asynchronous abort was (silently)
raised, to be caught much later on in the Linux kernel.

Fix this by making I2C1 and I2C2 optional just like I2C3 and I2C4
are.

To make the change binary-invariant, declare I2C1 and I2C2 in
every include/configs/ file which defines CONFIG_SYS_I2C_MXC.

Also, while updating README about CONFIG_SYS_I2C_MXC_I2C1 and
CONFIG_SYS_I2C_MXC_I2C2, add missing descriptions for I2C4 speed
(CONFIG_SYS_MXC_I2C4_SPEED) and slave (CONFIG_SYS_MXC_I2C4_SLAVE)
config options.

Signed-off-by: Albert ARIBAUD (3ADEV) <albert.aribaud@3adev.fr>





The driver assumed that I2C1 and I2C2 were always enabled,
and if they were not, then an asynchronous abort was (silently)
raised, to be caught much later on in the Linux kernel.

Fix this by making I2C1 and I2C2 optional just like I2C3 and I2C4
are.

To make the change binary-invariant, declare I2C1 and I2C2 in
every include/configs/ file which defines CONFIG_SYS_I2C_MXC.

Also, while updating README about CONFIG_SYS_I2C_MXC_I2C1 and
CONFIG_SYS_I2C_MXC_I2C2, add missing descriptions for I2C4 speed
(CONFIG_SYS_MXC_I2C4_SPEED) and slave (CONFIG_SYS_MXC_I2C4_SLAVE)
config options.

Signed-off-by: Albert ARIBAUD (3ADEV) <albert.aribaud@3adev.fr>