u-boot.git/drivers/mailbox/Kconfig, branch master Unnamed repository; edit this file 'description' to name the repository. dm: core: Default to using DEVRES outside of xPL 2026-01-09T15:08:14+00:00 Tom Rini trini@konsulko.com 2025-12-27T22:37:11+00:00 217cf656e249f698d390a7d8eaf255eb1a6c0230 The devm alloc functions that we have may follow the Linux kernel model where allocations are (almost always) automatically free()'d. However, quite often we don't enable, in full U-Boot, the tracking and free()'ing functionality. This in turn leads to memory leaks because the driver author expects that since the functions have the same name as in the Linux Kernel they have the same behavior. In turn we then get functionally correct commits such as commit 00e1fed93c8c ("firmware: ti_sci: Fix memory leaks in devm_ti_sci_get_of_resource") that manually add these calls. Rather than manually tracking allocations and implementing free()s, rework things so that we follow expectations by enabling the DEVRES functionality (outside of xPL phases). This turns DEVRES from a prompted symbol to a symbol that must be select'd, and we now remove our non-managed alloc/free functions from outside of xPL builds. Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Tom Rini <trini@konsulko.com> 
The devm alloc functions that we have may follow the Linux kernel model
where allocations are (almost always) automatically free()'d. However,
quite often we don't enable, in full U-Boot, the tracking and free()'ing
functionality. This in turn leads to memory leaks because the driver
author expects that since the functions have the same name as in the
Linux Kernel they have the same behavior. In turn we then get
functionally correct commits such as commit 00e1fed93c8c ("firmware:
ti_sci: Fix memory leaks in devm_ti_sci_get_of_resource") that manually
add these calls. Rather than manually tracking allocations and
implementing free()s, rework things so that we follow expectations by
enabling the DEVRES functionality (outside of xPL phases).

This turns DEVRES from a prompted symbol to a symbol that must be
select'd, and we now remove our non-managed alloc/free functions from
outside of xPL builds.

Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
mailbox: renesas: Add Renesas MFIS Multifunctional Interface mailbox driver 2025-12-02T23:17:15+00:00 Tuyen Dang tuyen.dang.xa@renesas.com 2025-10-27T16:39:17+00:00 5353fc464f00b2bf8e69ddbbcb4f1704566bcde2 Add support for the Renesas MFIS mailbox, which provides an interface between the different CPU Cores, such as AP System Core domain and the Realtime Core domain, SCP Core domain and AP System Core domain or Realtime Core domain and AP System Core domain or Realtime Core domain. Signed-off-by: Tuyen Dang <tuyen.dang.xa@renesas.com> Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org> # Update the driver [Marek: Rename the driver to renesas-mfis, simplify the driver. Always use only one TX channel and no RX channel, drop all unnecessary code. Perform 1ms delay in send callback which is perfectly fine to do in U-Boot which does RX polling] 
Add support for the Renesas MFIS mailbox, which provides an interface
between the different CPU Cores, such as AP System Core domain and the
Realtime Core domain, SCP Core domain and AP System Core domain or
Realtime Core domain and AP System Core domain or Realtime Core domain.

Signed-off-by: Tuyen Dang <tuyen.dang.xa@renesas.com>
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org> # Update the driver
[Marek: Rename the driver to renesas-mfis, simplify the driver.
        Always use only one TX channel and no RX channel, drop all
	unnecessary code. Perform 1ms delay in send callback which
	is perfectly fine to do in U-Boot which does RX polling]
mailbox: add PolarFire SoC mailbox driver 2025-08-14T07:33:00+00:00 Jamie Gibbons jamie.gibbons@microchip.com 2025-08-01T12:36:23+00:00 111e9bf6a5acc8187c4849cbf4e7516e37496059 This driver adds support for the single mailbox channel of the MSS system controller on the Microchip PolarFire SoC. Signed-off-by: Jamie Gibbons <jamie.gibbons@microchip.com> Acked-by: Leo Yu-Chi Liang <ycliang@andestech.com> 
This driver adds support for the single mailbox channel of the MSS
system controller on the Microchip PolarFire SoC.

Signed-off-by: Jamie Gibbons <jamie.gibbons@microchip.com>
Acked-by: Leo Yu-Chi Liang <ycliang@andestech.com>
mailbox: add i.MX Messaging Unit (MU) driver 2025-03-13T18:15:50+00:00 Peng Fan peng.fan@nxp.com 2025-03-04T06:57:40+00:00 21a4ac55c0d4eba836a45345d011093ffdc85b5c This patch provides a driver for i.MX Messaging Unit (MU) using the commom mailbox framework. This is ported from Linux (v6.12.8) driver drivers/mailbox/imx-mailbox.c. Its commit SHA is: 39d7d6177f0c ("mailbox: imx: use device name in interrupt name") Signed-off-by: Viorel Suman <viorel.suman@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Alice Guo <alice.guo@nxp.com> Reviewed-by: Ye Li <ye.li@nxp.com> 
This patch provides a driver for i.MX Messaging Unit (MU) using the
commom mailbox framework.

This is ported from Linux (v6.12.8) driver
drivers/mailbox/imx-mailbox.c. Its commit SHA is:
39d7d6177f0c ("mailbox: imx: use device name in interrupt name")

Signed-off-by: Viorel Suman <viorel.suman@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Alice Guo <alice.guo@nxp.com>
Reviewed-by: Ye Li <ye.li@nxp.com>
arm64: versal2: Add support for AMD Versal Gen 2 2024-06-17T14:02:29+00:00 Michal Simek michal.simek@amd.com 2024-05-29T14:47:58+00:00 40f5046c221a7b2719c49b51acefe12914b213e5 Add support for AMD Versal Gen 2. SoC is based on Cortex-a78ae 4 cluster/2 cpu core each. A lot of IPs are shared with previous families. There are couple of new IP blocks where the most interesting from user point of view is UFS. Signed-off-by: Michal Simek <michal.simek@amd.com> Link: https://lore.kernel.org/r/bc2b70831ce1031bd0fac32357bff84936e1310f.1716994063.git.michal.simek@amd.com 
Add support for AMD Versal Gen 2. SoC is based on Cortex-a78ae 4 cluster/2
cpu core each. A lot of IPs are shared with previous families. There are
couple of new IP blocks where the most interesting from user point of view
is UFS.

Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/bc2b70831ce1031bd0fac32357bff84936e1310f.1716994063.git.michal.simek@amd.com
mailbox: zynqmp: Enable ipi mailbox driver for Versal NET 2022-09-26T12:23:29+00:00 Jay Buddhabhatti jay.buddhabhatti@amd.com 2022-09-19T12:21:07+00:00 b6b2ad1cea7bf1f038875a28f2545ad70c25d0a3 Enable mailbox configs for Versal NET. Signed-off-by: Jay Buddhabhatti <jay.buddhabhatti@amd.com> Signed-off-by: Michal Simek <michal.simek@amd.com> Link: https://lore.kernel.org/r/b3a9a6a58b74d17e2ec5f60617fa42062fbab951.1663589964.git.michal.simek@amd.com 
Enable mailbox configs for Versal NET.

Signed-off-by: Jay Buddhabhatti <jay.buddhabhatti@amd.com>
Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/b3a9a6a58b74d17e2ec5f60617fa42062fbab951.1663589964.git.michal.simek@amd.com
arm64: versal: Enable power domain driver and its dependencies 2022-07-26T06:36:25+00:00 Ashok Reddy Soma ashok.reddy.soma@xilinx.com 2022-07-22T08:46:58+00:00 5f53e534ac15ad63ee530a43536b8da6c30cd36d Enable power domain driver to configure pmufw config object and request node for all the IP's that are enabled in DT. This driver depends on mailbox and IPI driver, hence enable them as well. Add ARCH_VERSAL in the depends on of mailbox Kconfig to compile for Versal platforms. Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com> Signed-off-by: Michal Simek <michal.simek@amd.com> Link: https://lore.kernel.org/r/20220722084658.30995-6-ashok.reddy.soma@xilinx.com 
Enable power domain driver to configure pmufw config object and request
node for all the IP's that are enabled in DT.

This driver depends on mailbox and IPI driver, hence enable them as well.
Add ARCH_VERSAL in the depends on of mailbox Kconfig to compile for
Versal platforms.

Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/20220722084658.30995-6-ashok.reddy.soma@xilinx.com
mailbox: apple: Add driver for Apple IOP mailbox 2022-02-10T21:44:23+00:00 Mark Kettenis kettenis@openbsd.org 2022-01-22T19:38:12+00:00 456305ec597908536e8e0de32dade43f9db00e8c This mailbox driver provides a communication channel with the Apple IOP controllers found on Apple SoCs. These IOP controllers are used to implement various functions such as the System Manegement Controller (SMC) and NVMe storage. It allows sending and receiving a 96-bit message over a single channel. The header file with the struct used for mailbox messages is taken straight from Linux. Signed-off-by: Mark Kettenis <kettenis@openbsd.org> Signed-off-by: Sven Peter <sven@svenpeter.dev> Reviewed-by: Simon Glass <sjg@chromium.org> Tested on: Macbook Air M1 Tested-by: Simon Glass <sjg@chromium.org> 
This mailbox driver provides a communication channel with the
Apple IOP controllers found on Apple SoCs.  These IOP controllers
are used to implement various functions such as the System
Manegement Controller (SMC) and NVMe storage.  It allows sending
and receiving a 96-bit message over a single channel.

The header file with the struct used for mailbox messages is taken
straight from Linux.

Signed-off-by: Mark Kettenis <kettenis@openbsd.org>
Signed-off-by: Sven Peter <sven@svenpeter.dev>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested on: Macbook Air M1
Tested-by: Simon Glass <sjg@chromium.org>
rename symbol: CONFIG_TEGRA -> CONFIG_ARCH_TEGRA 2020-05-15T18:47:35+00:00 Trevor Woerner twoerner@gmail.com 2020-05-06T12:02:41+00:00 18138ab20347ffe5a2b80dd180026dae697a160d Have this symbol follow the pattern of all other such symbols. Signed-off-by: Trevor Woerner <twoerner@gmail.com> 
Have this symbol follow the pattern of all other such symbols.

Signed-off-by: Trevor Woerner <twoerner@gmail.com>
mailbox: zynqmp: ipi mailbox driver 2019-10-08T07:55:11+00:00 Ibai Erkiaga ibai.erkiaga-elorza@xilinx.com 2019-09-27T10:36:56+00:00 660b0c77d81603c7911a3e5c024d646a801cd0ac ZynqMP mailbox driver implementing IPI communication with PMU. This would allow U-Boot SPL to communicate with PMUFW to request privileged operations. Signed-off-by: Ibai Erkiaga <ibai.erkiaga-elorza@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> 
ZynqMP mailbox driver implementing IPI communication with PMU. This would
allow U-Boot SPL to communicate with PMUFW to request privileged
operations.

Signed-off-by: Ibai Erkiaga <ibai.erkiaga-elorza@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>